LRS1392A Sharp Electronics, LRS1392A Datasheet - Page 12

• Manufacturer Part Number: LRS1392A
• Manufacturer: Sharp Electronics

Specifications of LRS1392A

• Lead Free Status / RoHS Status: Supplier Unconfirmed

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6. Either 40H or 10H are recognized by the CUI (Command User Interface) as the program setup.
7. Following the third bus cycle, inputs the program sequential address and write data of “N” times. Finally, input the any
8. If the program operation in one partition is suspended and the erase operation in other partition is also suspended, the
9. Full chip erase and OTP program operations can not be suspended. The OTP Program command can not be accepted while
10. Following the Clear Block Lock Bit command, block which is not locked-down is unlocked when F-WP is V
11. Commands other than those shown above are reserved by SHARP for future device implementations and should not be
valid address within the target partition to be programmed and the confirm command (D0H). Refer to the LH28F320BF,
LH28F640BF, LH28F128BF series Appendix for details.
suspended program operation should be resumed first, and then the suspended erase operation should be resumed next.
the block erase operation is being suspended.
When F-WP is V
used.
IH
, lock-down bit is disabled and the selected block is unlocked regardless of lock-down configuration.
L R S 1 3 9 2 A
IL
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