RD38F2030W0ZBQ1 Micron Technology Inc, RD38F2030W0ZBQ1 Datasheet

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RD38F2030W0ZBQ1

Manufacturer Part Number
RD38F2030W0ZBQ1
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of RD38F2030W0ZBQ1

Operating Supply Voltage (max)
1.95V
Operating Temperature (max)
85C
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant

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Part Number:
RD38F2030W0ZBQ1
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TI
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RD38F2030W0ZBQ1
Manufacturer:
INTEL
Quantity:
20 000
Intel
(W18/W30 SCSP)
32WQ and 64WQ Family with Asynchronous RAM
Product Features
The Intel® Wireless Flash Memory (W18/W30 SCSP) family offers a variety of flash plus static
RAM combinations in a common package footprint. The flash memory features 1.8 V low-power
operations with flexible, multi-partition, dual-operation Read-While-Write / Read-While-Erase,
asynchronous, and synchronous reads. This SCSP device integrates up to two flash die, one
PSRAM die, and one SRAM die in a low-profile package compatible with other SCSP families
with QUAD+ ballout.
Device Architecture
Device Voltage
Device Packaging
PSRAM Performance
SRAM Performance
— Flash Density: 32-Mbit, 64-Mbit
— Async PSRAM Density: 8-, 16-, 32-Mbit
— Async SRAM Density: 4-, 8-, 16-Mbit
— Top, Bottom or Dual flash parameter
— Flash V
— Flash V
— Flash V
— RAM V
— RAM V
— 88 balls (8 x 10 active ball matrix)
— Area: 8x10 mm
— Height: 1.2 mm to 1.4 mm
— 88 ns initial access, 30 ns async page
— 70 ns initial access, 25 ns async page
— 85 ns initial access, 35 ns async page
— 70 ns initial access, 25 ns async page
— 70 ns initial access at 1.8 V or 3.0 V I/O
configuration
reads at 1.8 V I/O
reads at 1.8 V I/O
reads at 3.0 V I/O
reads at 3.0 V I/O
®
Wireless Flash Memory
CC
CCQ
CCQ
CC
CCQ
= 1.8 V (90 nm or 130 nm)
= 3.0 V
= 1.8 V (90 nm)
= 1.8 V or 3.0 V (130 nm)
= 1.8 V or 3.0 V
Flash Performance
Flash Architecture
Flash Software
Quality and Reliability
— 65 ns initial access at 1.8 V I/O
— 70 ns initial access at 3.0 V I/O
— 25 ns async page at 1.8 V or 3.0 V I/O
— 14 ns sync reads (t
— 20 ns sync reads (t
— Enhanced Factory Programming:
— Read-While-Write/Erase
— Asymmetrical blocking structure
— 4-KWord parameter blocks (Top or
— 32-KWord main blocks
— 4-Mbit partition size
— 128-bit One-Time Programmable (OTP)
— Zero-latency block locking
— Absolute write protection with block lock
— Intel
— Common Flash Interface (CFI)
— Extended Temperature: –25 °C to +85 °C
— Minimum 100K flash block erase cycle
— 90 nm ETOX™ IX flash technology
— 130 nm ETOX™ VIII flash technology
3.10 µs/Word (Typ)
Bottom)
Protection Register
using F-VPP and F-WP#
Order Number: 251407, Revision: 009
®
Flash Data Integrator (FDI)
CHQV
CHQV
) at 1.8 V I/O
) at 3.0 V I/O
Datasheet
June 2005

Related parts for RD38F2030W0ZBQ1

RD38F2030W0ZBQ1 Summary of contents

Page 1

Intel Wireless Flash Memory (W18/W30 SCSP) 32WQ and 64WQ Family with Asynchronous RAM Product Features Device Architecture — Flash Density: 32-Mbit, 64-Mbit — Async PSRAM Density: 8-, 16-, 32-Mbit — Async SRAM Density: 4-, 8-, 16-Mbit — Top, Bottom ...

Page 2

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. EXCEPT AS PROVIDED IN INTEL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO SALE ...

Page 3

Contents 1.0 Introduction....................................................................................................................................6 1.1 Nomenclature ....................................................................................................................... 6 1.2 Conventions.......................................................................................................................... 6 2.0 Functional Overview .....................................................................................................................8 2.1 Block Diagram ...................................................................................................................... 8 2.2 Flash Memory Map and Partitioning ..................................................................................... 9 3.0 Package Information ...................................................................................................................11 4.0 Ballout and Signal Description ..................................................................................................13 4.1 Signal Ballout......................................................................................................................13 ...

Page 4

Intel® Wireless Flash Memory (W18/W30 SCSP) 16.1 Power-Up Sequence and Initialization................................................................................ 41 16.2 Standby Mode/ Deep Power-Down Mode .......................................................................... 42 16.3 PSRAM Special Read and Write Constraints ..................................................................... 43 Appendix A Write State Machine................................................................................................. 45 Appendix B Common Flash Interface......................................................................................... ...

Page 5

Revision History Date Revision June 2003 -001 Initial release. Changed PSRAM Read values. September -002 Added new Transient Equivalent Testing Load Circuit figure. 2003 General text edits. May 2004 -006 Reformatted the datasheet and moved sections around according to the ...

Page 6

Intel® Wireless Flash Memory (W18/W30 SCSP) 1.0 Introduction This document contains information pertaining to the products in the Intel Memory (W18/W30 SCSP) family with asynchronous RAM. The W18/W30 SCSP 32WQ and 64WQ families offer a wide variety of stacked combinations ...

Page 7

Device: This term is used interchangeably throughout this document to denote either a particular die, or the combination of multiple die within a single package. F[3:1]-CE#, F[2:1]-OE#: This is the method used to refer to more than one chip-enable or ...

Page 8

Intel® Wireless Flash Memory (W18/W30 SCSP) 2.0 Functional Overview This section provides an overview of the features and capabilities of the Intel® Wireless Flash Memory (W18/W30 SCSP) family with asynchronous RAM device. The W18/W30 SCSP device provides flash + RAM ...

Page 9

Flash Memory Map and Partitioning Consult the latest Intel ® Intel Wireless Flash Memory (W30) Datasheet (order number 290702), for individual flash die memory map and partitioning information. Table 1 and Table 2 configurations. Flash Die #1 (with F1-CE# ...

Page 10

Intel® Wireless Flash Memory (W18/W30 SCSP) Table 2. 64-Mbit Dual-Flash Die W18/W30 SCSP Memory Map and Partitioning Partitioning Parameter Partition Top Parameter Partitions Partitions Bottom Parameter Parameter Partition June 2005 Intel® Wireless Flash Memory (W18/W30 SCSP) 10 Block Size (KW) ...

Page 11

Package Information The following packages are offered with the 32WQ and 64WQ Family : • Figure 1, “Mechanical Specifications for 1- or 2-Die SCSP Device (8x10x1.2 mm)” • Figure 2, “Mechanical Specifications for Triple-Die SCSP Device (8x10x1.4 mm)” Figure ...

Page 12

Intel® Wireless Flash Memory (W18/W30 SCSP) Figure 2. Mechanical Specifications for Triple-Die SCSP Device (8x10x1.4 mm) A1 Index Mark Top View ...

Page 13

Ballout and Signal Description 4.1 Signal Ballout Figure 1 shows the 32WQ and 64WQ W18/W30 SCSP family 88-ball (8x10 active ball matrix) device. Figure 1. 88-Ball (8x10 Active Ball Matrix) QUAD+ Ballout ...

Page 14

Intel® Wireless Flash Memory (W18/W30 SCSP) 4.2 Signal Descriptions Table 1 describes active signals used on the 32WQ and 64WQ W18/W30 SCSP family. Table 1. Signal Descriptions (Sheet Symbol Type ADDRESS INPUTS: Inputs for all die addresses ...

Page 15

Table 1. Signal Descriptions (Sheet Symbol Type FLASH OUTPUT ENABLE: Low-true; OE#-low enables the flash output buffers. OE#-high disables the flash output buffers, and places the flash outputs in High-Z. F[2:1]-OE# Input F1-OE# controls the outputs of ...

Page 16

Intel® Wireless Flash Memory (W18/W30 SCSP) 5.0 Maximum Ratings and Operating Conditions 5.1 Absolute Maximum Ratings Warning: Stressing the device beyond the “Absolute Maximum Ratings” may cause permanent damage. These are stress ratings only. NOTICE: This document contains information available ...

Page 17

Operating Conditions Warning: Operation beyond the “Operating Conditions” is not recommended and extended exposure beyond the “Operating Conditions” may affect device reliability. Table 2. Operating Conditions Symbol T Operating Temperature C F-V Flash Supply Voltage CC Flash I/O Voltage ...

Page 18

Intel® Wireless Flash Memory (W18/W30 SCSP) 6.0 Electrical Specifications 6.1 DC Characteristics SRAM and PSRAM DC characteristics are shown in ® Intel Wireless Flash Memory (W18) Datasheet (order number 290701) and the Intel Flash Memory (W30) Datasheet (order number 290702) ...

Page 19

Table 1. SRAM DC Characteristics (Sheet Input Leakage Current IL Input Leakage Current *I in Data Retention LDR Mode * Input leakage currents include Hi-Z output leakage for bi-directional buffers with tri-state outputs. Table 2. PSRAM ...

Page 20

Intel® Wireless Flash Memory (W18/W30 SCSP) Table 3. PSRAM DC Characteristics Parameter Description V Voltage Range CC Operating Current min cycle time Operating Current I at max cycle time CC2 (1 µs) P-CS# ≥ P-V I Standby ...

Page 21

AC Characteristics 7.1 Flash AC Characteristics Æ Refer to the Intel Wireless Flash Memory (W18) Datasheet (order number 290701) and Intel Wireless Flash Memory (W30) Datasheet (order number 290702) for flash AC characteristics details not included in Table 10. ...

Page 22

Intel® Wireless Flash Memory (W18/W30 SCSP) Table 11. SRAM AC Characteristics — Read Operations # Symbol R11 t R-UB#, R-LB# to Output in Low-Z BLZ R12 t R-UB#, R-LB# to Output in High-Z BHZ Note: 1. See Figure 5, “AC ...

Page 23

Table 12. SRAM AC Characteristics — Write Operations W8 t Write Recovery R-UB#, R-LB# Setup to R-WE# (S-CS1#) High BW Notes: 1. See Figure 6, “AC Waveform SRAM Write Operations” write occurs during the overlap ...

Page 24

Intel® Wireless Flash Memory (W18/W30 SCSP) Table 13. PSRAM AC Characteristics — Read Operations # Symbol Output Hold (from Address, P-CS R10 t OH OE# change, whichever occurs first) R11 t R-UB#, R-LB# to Output in Low-Z BLZ ...

Page 25

Table 14. PSRAM AC Characteristics — Read Operations (Sheet Symbol Parameter PR1 t Page Cycle Time PC PR2 t Page Access Time PA Note: 1. See Figure 7, “AC Waveform of PSRAM Read Operations” on page ...

Page 26

Intel® Wireless Flash Memory (W18/W30 SCSP) Table 16. PSRAM AC Characteristics—Write Operations # Symbol W1 t Write Cycle Time WC Address Setup to R-WE (P-CS#) and R-UB#, R-LB# going low W3 t R-WE#(P-CS#) Pulse Width WP W4 ...

Page 27

Figure 7. AC Waveform of PSRAM Read Operations ADDRESSES P-CS# R-UB#, R-LB# R-OE# DAT A Figure 8. AC Waveform of PSRAM 4-Word Page Read Operation A[Max:2] A[1:0] P-CS# R-OE# R6 DATA Note: Available only for 32-Mbit PSRAM and line items ...

Page 28

Intel® Wireless Flash Memory (W18/W30 SCSP) Figure 9. AC Waveform PSRAM Write Operation ADDRESSES P-CS# R-UB#, R-LB# R-WE# DAT A 7.4 Device AC Test Conditions Figure 10. Transient Input/Output Reference Waveform V , P-V CCQ CC Input 0 V Note: ...

Page 29

Flash Power Consumption Æ Refer to the Intel Wireless Flash Memory (W18) Datasheet (order number 290701) and Intel Wireless Flash Memory (W30) Datasheet (order number 290702) for information regarding flash read modes and operations. Datasheet Intel® Wireless Flash Memory ...

Page 30

Intel® Wireless Flash Memory (W18/W30 SCSP) 9.0 Device Operation 9.1 Bus Operations Bus operations for the W18/W30 SCSP family involve the following chip enable and output enable signals, respectively: • F1-CE# for Flash Die#1 and F2-CE# for Flash Die#2 • ...

Page 31

Mode Sync Array Read H H All Async / H H Sync Non-Array Read Write H H Output Disable H X Standby H X Reset L X Notes: 1. For asynchronous read operation, both die may be simultaneously selected, but ...

Page 32

Intel® Wireless Flash Memory (W18/W30 SCSP) Table 2. Flash + SRAM Bus Operations Mode Read Flash must be in High-Z Write Output Disable Standby Any flash mode allowed Data Retention Notes: 1. For asynchronous read operation, all die may be ...

Page 33

Table 3. Flash + PSRAM Bus Operations Mode Read Flash#1 and #2 must be in High-Z Write Output Disable Standby Any flash mode allowed Deep Power- Down Notes: 1. For asynchronous read operation, all die may be simultaneously selected, but ...

Page 34

Intel® Wireless Flash Memory (W18/W30 SCSP) 10.0 Flash Read Operations Æ Refer to the Intel Wireless Flash Memory (W18) Datasheet (order number 290701) and Intel Wireless Flash Memory (W30) Datasheet (order number 290702) for information regarding flash read modes and ...

Page 35

Flash Program Operations Æ Refer to the Intel Wireless Flash Memory (W18) Datasheet (order number 290701) and Intel Wireless Flash Memory (W30) Datasheet (order number 290702) for information regarding flash read modes and operations. Datasheet Intel® Wireless Flash Memory ...

Page 36

Intel® Wireless Flash Memory (W18/W30 SCSP) 12.0 Flash Erase Operations Æ Refer to the Intel Wireless Flash Memory (W18) Datasheet (order number 290701) and Intel Wireless Flash Memory (W30) Datasheet (order number 290702) for information regarding flash read modes and ...

Page 37

Flash Security Modes Æ Refer to the Intel Wireless Flash Memory (W18) Datasheet (order number 290701) and Intel Wireless Flash Memory (W30) Datasheet (order number 290702) for information regarding flash read modes and operations. Datasheet Intel® Wireless Flash Memory ...

Page 38

Intel® Wireless Flash Memory (W18/W30 SCSP) 14.0 Flash Read Configuration Register Æ Refer to the Intel Wireless Flash Memory (W18) Datasheet (order number 290701) and Intel Wireless Flash Memory (W30) Datasheet (order number 290702) for information regarding flash read modes ...

Page 39

SRAM Operations 15.1 Power-up Sequence and Initialization The SRAM functionality and reliability are independent of the power-up sequence and power-up slew rate of the core S-V conditions. SRAM reliability is also independent of the power-down sequence and power-down slew ...

Page 40

Intel® Wireless Flash Memory (W18/W30 SCSP) Figure 2. SRAM Data Retention Operation Waveform—S-CS2 Controlled S-V CC S-CS2 S-V CCMIN ILMAX V SS June 2005 Intel® Wireless Flash Memory (W18/W30 SCSP Data Retention Mode SDR Order ...

Page 41

PSRAM Operations 16.1 Power-Up Sequence and Initialization The PSRAM functionality and reliability are independent of the power-up sequence and slew rate of the core P-V . Any power-up sequence and slew rate is possible under use conditions. PSRAM CC ...

Page 42

Intel® Wireless Flash Memory (W18/W30 SCSP) Figure 2. PSRAM Register Setting Flowchart at Initialization 16.2 Standby Mode/ Deep Power-Down Mode Caution: 38F2020W0ZTQ1, 38F2020W0ZBQ1, 38F2030W0YTQ1, 38F2030W0YBQ1, 38F2030W0ZTQ2, 38F2030W0ZBQ2, 38F1030W0ZTQ0, 38F1030W0ZBQ0, 38F1030W0YTQE, 38F1030W0YBQE line items do not have the deep power-down feature. ...

Page 43

Mode Standby Deep Power-Down Figure 3. Timing Waveform for Entering Deep Power-Down Mode P-MODE P-CS# Device Mode 16.3 PSRAM Special Read and Write Constraints Caution: This section does not apply to 38F2020W0ZTQ1, 38F2020W0ZBQ1, 38F2030W0YTQ1, 38F2030W0YBQ1, 38F2030W0ZTQ2, 38F2030W0ZBQ2, 38F1030W0ZTQ0, 38F1030W0ZBQ0, 38F1030W0YTQE, ...

Page 44

Intel® Wireless Flash Memory (W18/W30 SCSP) Table 3. PSRAM Special Write Constraints Need either R-WE# high or P-CS# high for at least t time, for every 4us window during write operations. R-OE# high to R-WE# low in active mode (P-CS# ...

Page 45

Appendix A Write State Machine Æ Refer to the Intel Wireless Flash Memory (W18) Datasheet (order number 290701) and Intel Wireless Flash Memory (W30) Datasheet (order number 290702) for the WSM details. Datasheet Intel® Wireless Flash Memory (W18/W30 SCSP) Intel® ...

Page 46

Intel® Wireless Flash Memory (W18/W30 SCSP) Appendix B Common Flash Interface Æ Refer to the Intel Wireless Flash Memory (W18) Datasheet (order number 290701) and Intel Wireless Flash Memory (W30) Datasheet (order number 290702) for the CFI details. June 2005 ...

Page 47

Appendix C Flash Flowcharts Æ Refer to the Intel Wireless Flash Memory (W18) Datasheet (order number 290701) and Intel Wireless Flash Memory (W30) Datasheet (order number 290702) for the flash flowchart details. Datasheet Intel® Wireless Flash Memory (W18/W30 SCSP) Intel® ...

Page 48

Intel® Wireless Flash Memory (W18/W30 SCSP) Appendix D Additional Information : Order Number Document 290701 1.8 Volt Intel 290702 1.8 Volt Intel 251216 64-Mbit 1.8 Volt Intel Notes: 1. Please call the Intel Literature Center at (800) 548-4725 to request ...

Page 49

Appendix E Ordering Information Figure 1 shows the decoder for products in this SCSP family with both flash and RAM. shows the decoder for products in this SCSP family with flash die only (no RAM). and 64WQ W18/W30 SCSP Ordering ...

Page 50

Intel® Wireless Flash Memory (W18/W30 SCSP) Figure 2. Decoder for Flash-Only SCSP Family Devices Package RD = SCSP PF = Pb-free SCSP Product Line Designator 48F = Flash-only Stack Device Flash Density 2 = 64-Mbit 1 = ...

Page 51

W18 = Intel with 3 Bottom Parameter, where Flash Die #1, F1-CE# = Bottom Parameter and Flash Die #2, F2-CE# = Top Parameter Top Parameter where Flash Die #1, F1-CE# ...

Page 52

... No PMODE pin PF38F1030W0ZTQ0 70 ns, PF38F1030W0ZBQ0 No PMODE pin RD38F2030W0YTQ1 RD38F2030W0YBQ1 PF38F2030W0YTQ1 PF38F2030W0YBQ1 70 ns, No PMODE pin RD38F2030W0YTQE RD38F2030W0YBQE PF38F2030W0YTQE PF38F2030W0YBQE RD38F2030W0ZTQ1 85 ns, RD38F2030W0ZBQ1 with PMODE pin RD38F2030W0ZTQ2 RD38F2030W0ZBQ2 70 ns, No PMODE pin PF38F2030W0ZTQ2 PF38F2030W0ZBQ2 RD38F2040W0YTQ0 RD38F2040W0YBQ0 88 ns, with PMODE pin PF38F2040W0YTQ0 PF38F2040W0YBQ0 RD38F2040W0ZTQ0 85 ns, RD38F2040W0ZBQ0 ...

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