LM1237BDKD/NA/NOPB National Semiconductor, LM1237BDKD/NA/NOPB Datasheet - Page 34

• Manufacturer Part Number: LM1237BDKD/NA/NOPB
• Manufacturer: National Semiconductor

Specifications of LM1237BDKD/NA/NOPB

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Package Type: MDIP
• Lead Free Status / RoHS Status: Compliant

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Control Register Definitions
Register Names (addresses): ROMSIGDATAB1 (0x840F) and ROMSIGDATAB0 (0x840E)
CRC15 CRC14 CRC13 CRC12 CRC11 CRC10 CRC9 CRC8 CRC7 CRC6 CRC5 CRC4 CRC3 CRC2 CRC1 CRC0
Display Window 1 Horizontal Start Location Register
Register Name (address): HSTRT1 (0x8410)
Display Window 1 Vertical Start Location Register
Register Name (address): VSTRT1 (0x8411)
Bits 15–0
Bits 7–0
Bits 7–0
15
1H7
1V7
7
7
14
This is the checksum of the 256 ROM characters truncated to 16 bits (modulo 65535). All devices with the
same masked ROM will have the same checksum.
There are two possible OSD windows which can be displayed simultaneously or individually. This register
determines the horizontal start position of Window 1 in OSD pixels (not video signal pixels). The actual
position, to the right of the horizontal flyback pulse, is determined by multiplying this register value by 4 and
adding 30. Due to pipeline delays, the first usable start location is approximately 42 OSD pixels following the
horizontal flyback time. For this reason, we recommend this register be programmed with a number larger
than 2, otherwise improper operation may result.
This register determines the Vertical start position of the Window 1 in constant-height character lines (not
video scan lines). The actual position is determined by multiplying this register value by 2. (Note: each
character line is treated as a single auto-height character pixel line, so multiple scan lines may actually be
displayed in order to maintain accurate position relative to the OSD character cell size. See the Constant
Character Height Mechanism section.) This register should be set so the entire OSD window is within the
active video.
13
1H6
1V6
6
6
12
11
1H5
1V5
5
5
10
(Continued)
9
1H4
1V4
4
4
8
34
7
1H3
1V3
3
3
6
5
1H2
1V2
2
2
4
3
1H1
1V1
1
1
2
1
1H0
1V0
0
0
0