P87LPC762BD NXP Semiconductors, P87LPC762BD Datasheet - Page 48

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P87LPC762BD

Manufacturer Part Number
P87LPC762BD
Description
MCU 8-Bit 87LP 80C51 CISC 2KB EPROM 5V 20-Pin SO Tube
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P87LPC762BD

Package
20SO
Device Core
80C51
Family Name
87LP
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
18
Interface Type
I2C/UART
Number Of Timers
2
Ram Size
128 Byte
Program Memory Size
2 KB
Program Memory Type
EPROM
Operating Temperature
0 to 70 °C

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3. Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to VSS unless otherwise noted.
1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and
2. This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive static
Philips Semiconductors
Security Bits
When neither of the security bits are programmed, the code in the EPROM can be verified. When only security bit 1 is programmed, all further
programming of the EPROM is disabled. At that point, only security bit 2 may still be programmed. When both security bits are programmed,
EPROM verify is also disabled.
Table 11. EPROM Security Bits
ABSOLUTE MAXIMUM RATINGS
NOTES:
2001 Oct 26
Operating temperature under bias
Storage temperature range
Voltage on RST/V
Voltage on any other pin to V
Maximum I
Power dissipation (based on package heat transfer, not device power consumption)
Low power, low price, low pin count (20 pin)
microcontroller with 2 kbyte OTP
UCFG2
functional operation of the device at these or any conditions other than those described in the AC and DC Electrical Characteristics section
of this specification are not implied.
charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maximum.
SB2
1
1
0
0
BIT
UCFG2.7, 6
UCFG2.5–0
OL
Address: FD01h
SB1
per I/O pin
1
0
1
0
PP
pin to V
Both security bits unprogrammed. No program security features enabled. EPROM is programmable and verifiable.
Only security bit 1 programmed. Further EPROM programming is disabled. Security bit 2 may still be programmed.
Only security bit 2 programmed. This combination is not supported.
Both security bits programmed. All EPROM verification and programming are disabled.
SYMBOL
SB2, SB1
SS
SS
SB2
7
FUNCTION
EPROM security bits. See table entitled, “EPROM Security Bits” for details.
Reserved for future use.
Figure 37. EPROM System Configuration Byte 2 (UCFG2)
PARAMETER
SB1
6
5
4
45
Protection Description
3
2
1
0
–0.5 to V
–55 to +125
–65 to +150
Unprogrammed Value: FFh
0 to +11.0
RATING
1.5
20
DD
+0.5V
87LPC762
Preliminary data
SU01186
UNIT
mA
W
V
V
C
C

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