W83628AG Nuvoton Technology Corporation of America, W83628AG Datasheet - Page 41
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W83628AG
Manufacturer Part Number
W83628AG
Description
Manufacturer
Nuvoton Technology Corporation of America
Datasheet
1.W83628AG.pdf
(65 pages)
Specifications of W83628AG
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Rad Hardened
No
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
W83628AG
Manufacturer:
NUVOTON
Quantity:
1 000
Bit [7:0]
Address Offset:
Default Value:
Attribute:
Bit 23
Bit 22
Bit [21:16]
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit [10:8]
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
10.35
Reserved. No data should be written to this register.
Fast Memory Decoder#3 Mask Control
Bit[7:0] is used to mask PCI address bits of A[23:14], respectively. If the corresponding
bit of the register is set to 1 (one), the corresponding address bits [23:14] are ignored by
the Fast Memory Address Decoder #3. The following example shows the Fast Memory
Decoder #3 size setting. If bit[7:0] = 00h, the size is 16K bytes. If bit[7:0]=01h, the size is
32K bytes. If bit[7:0]=7fh, the size is 2M bytes. If bit[7:0]=ffh, the size is 4M bytes.
Reserved. No data should be written to this register.
Reserved. No data should be written to this register.
Reserved. No data should be written to this register.
Reserved
Reserved
Reserved
Reserved
Reserved. Always write 0 to the bits.
Reserved. No data should be written to this register.
Reserved. No data should be written to this register.
Reserved. No data should be written to this register.
0= 80h port decoding on subtractive cycles of LPC I/F
1= 80h port decoding on positive cycles of LPC I/F
This bit must be set to 1 when LPC I/F is only decoding on positive cycles, but
when the bridge is used in PIIX4 for test, set the bit to 0.
Reserved. No data should be written to this register.
Reserved. No data should be written to this register.
Reserved. No data should be written to this register.
Reserved. No data should be written to this register.
WISA_TSTREG-ISA BRIDGE TEST REGISTER
82h_81h_80h
3Fh_00h_08h
Read/Write
- 36 -
W83628AG & W83629AG
Publication Release Date: January, 2008
Revision 1.2