W83628AG Nuvoton Technology Corporation of America, W83628AG Datasheet - Page 16

• Manufacturer Part Number: W83628AG
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83628AG

• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 70C
• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

9. PIN DESCRIPTION
Note: Please refer to Section 10 DC CHARACTERISTICS for details.
I/O 10t
I/O 18t
I/O 10tp3
I/O 18tp3
I/OD 10t
I/OD 18t
OUT 10t
OUT 18t
OD 10
IN t
IN ts
9.1.1
AD[31:0]
C/BE[3:0]#
PCICLK
9.1
SYMBOL
PCI Interface
W83628AG PIN DESCRIPTION
- TTL level bi-directional pin with 10 mA source-sink capability
- TTL level bi-directional pin with 18 mA source-sink capability
- 3.3V TTL level bi-directional pin with 10 mA source-sink capability
- 3.3V TTL level bi-directional pin with 18 mA source-sink capability
- TTL level bi-directional pin open drain output with 10 mA sink capability
- TTL level bi-directional pin open drain output with 18 mA sink capability
- TTL level output pin with 10 mA source-sink capability
- TTL level output pin with 18 mA source-sink capability
- Open-drain output pin with 10 mA sink capability
- TTL level input pin
- TTL level Schmitt-trigger input pin
19-26
30-37
52-59
61-63
66-70
28,44
51,60
PIN
47
I/O 18tp3
I/O 18tp3
IN ts
I/O
PCI Bus Address and Data Signals. The standard
PCI address and data lines. The address is driven
with FRAME# assertion; the data is driven or
received in following clocks.
PCI Bus Command and Byte Enables. During the
address phase of a transaction, C/BE[3:0]# define
the bus command. During the data phase,
C/BE[3:0]# are used as Byte Enables.
PCI Bus System Clock. PCICLK provides timing
for all transactions on the PCI bus. All the other PCI
signals are sampled on the rising edge of PCICLK,
and all timing parameters are defined with respect
to this edge.
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W83628AG & W83629AG
FUNCTION
Publication Release Date: January, 2008
Revision 1.2
LEVEL
3.3V
3.3V
3.3V