DS90C387AVJD National Semiconductor, DS90C387AVJD Datasheet - Page 5
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DS90C387AVJD
Manufacturer Part Number
DS90C387AVJD
Description
Manufacturer
National Semiconductor
Datasheet
1.DS90C387AVJD.pdf
(19 pages)
Specifications of DS90C387AVJD
Number Of Elements
8
Input Type
CMOS/TTL
Operating Supply Voltage (typ)
3.3V
Differential Input High Threshold Voltage
100mV
Diff. Input Low Threshold Volt
-100mV
Output Type
Flat Panel Display
Differential Output Voltage
450mV
Operating Temp Range
-10C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Package Type
TQFP
Number Of Receivers
48
Number Of Drivers
8
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DS90C387AVJD
Manufacturer:
NSC
Quantity:
904
Company:
Part Number:
DS90C387AVJD
Manufacturer:
NS
Quantity:
8
Company:
Part Number:
DS90C387AVJD/NOPB
Manufacturer:
Texas Instruments
Quantity:
10 000
Company:
Part Number:
DS90C387AVJDX/NOPB
Manufacturer:
Texas Instruments
Quantity:
10 000
LLHT
LHLT
TBIT
TPPOS
TCCS
TSTC
THTC
TJCC
TPLLS
TPDD
TCIT
TCIP
TCIH
TCIL
TXIT
Symbol
Symbol
Recommended Transmitter Input Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Transmitter Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
TxCLK IN Transition Time (Figure 5)
TxCLK IN Period (Figure 6)
TxCLK in High Time (Figure 6)
TxCLK in Low Time (Figure 6)
TxIN Transition Time
LVDS Low-to-High Transition Time (Figure 3), PRE = 0.75V
(disabled)
LVDS Low-to-High Transition Time (Figure 3), PRE = Vcc (max)
LVDS High-to-Low Transition Time (Figure 3), PRE = 0.75V
(disabled)
LVDS High-to-Low Transition Time (Figure 3), PRE = Vcc (max)
Transmitter Output Bit Width
Transmitter Pulse Positions - Normalized
TxOUT Channel to Channel Skew
TxIN Setup to TxCLK IN (Figure 6)
TxIN Hold to TxCLK IN (Figure 6)
Transmitter Jitter Cycle-to-cycle (Figures
13, 14) (Note 5), DUAL=Vcc
Transmitter Phase Lock Loop Set (Figure 8)
Transmitter Powerdown Delay (Figure 10)
Parameter
Parameter
DUAL=Gnd or Vcc
DUAL=1/2Vcc
f = 33 to 70 MHz
f = 70 to 112 MHz
f = 112 MHz
f = 85 MHz
f = 65 MHz
f = 56 MHz
f = 32.5 MHz
DUAL=Gnd or Vcc
DUAL=1/2Vcc
DUAL=Gnd or Vcc
DUAL=1/2Vcc
5
−250
−200
8.928
0.35T
0.35T
Min
5.88
2.7
Min
1.0
1.0
1.5
0
1/7 TCIP
2/7 TCIP
0.14
0.11
0.16
0.11
Typ
0.5T
0.5T
100
100
Typ
2.0
1.5
85
60
70
75
0
0
T
30.77
15.38
0.65T
0.65T
+250
+200
Max
Max
100
120
110
100
0.7
0.6
0.8
0.7
3.0
1.7
6.0
75
80
10
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