SAA7118H NXP Semiconductors, SAA7118H Datasheet - Page 44

SAA7118H

Manufacturer Part Number
SAA7118H
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA7118H

Adc/dac Resolution
9b
Screening Level
Commercial
Package Type
PQFP
Pin Count
160
Lead Free Status / RoHS Status
Compliant

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Part Number
Manufacturer
Quantity
Price
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SAA7118H
Manufacturer:
PHILIPS/飞利浦
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NXP Semiconductors
SAA7118_7
Product data sheet
8.4 Scaler
The High Performance video Scaler (HPS) is based on the system as implemented in
previous products, but with some aspects enhanced. Vertical upsampling is supported
and the processing pipeline buffer capacity is enhanced, to allow more flexible video
stream timing at the image port, discontinuous transfers, and handshake. The internal
data flow from block to block is discontinuous dynamically, due to the scaling process.
Fig 34. Horizontal timing diagram (50/60 Hz)
50 Hz
60 Hz
The signals HREF, HS, CREF2 and CREF are available on pins RTS0 and/or RTS1 (see
Table 56
The signals HREF and HS are available on pin XRH (see
programming range
programming range
(step size: 8 / LLC)
(step size: 8 / LLC)
and
expansion port
HREF (50 Hz)
HREF (60 Hz)
CVBS input
data output
HS (50 Hz)
HS (60 Hz)
Table
CREF2
CREF2
CREF
CREF
Rev. 07 — 7 July 2008
57); their polarity can be inverted via RTP0 and/or RTP1.
108
107
Multistandard video decoder with adaptive comb filter
720
5
1
720
processing delay ADC to expansion port:
2 / LLC
2 / LLC
2 / LLC
2 / LLC
140
1 / LLC
0
0
burst
12
16
Table
2 / LLC
2 / LLC
138
144
58).
2 / LLC
2 / LLC
sync clipped
SAA7118
2
2
© NXP B.V. 2008. All rights reserved.
2 / LLC
2 / LLC
mhb542
107
106
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