SAA7104H/V1,557 NXP Semiconductors, SAA7104H/V1,557 Datasheet - Page 28
SAA7104H/V1,557
Manufacturer Part Number
SAA7104H/V1,557
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7104HV1557.pdf
(71 pages)
Specifications of SAA7104H/V1,557
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Philips Semiconductors
7.23
Table 16 I
Table 17 I
Table 18 I
Table 19 I
Table 20 I
Table 21 I
Table 22 Explanations of Tables 16 to 21
Notes
1. X is the read/write control bit; X = logic 0 is order to write; X = logic 1 is order to read.
2. If more than 1 byte of DATA is transmitted, then auto-increment of the subaddress is performed.
2004 Mar 04
S 1 0 0 0 1 0 0 0 A FEH
S
Sr
1 0 0 0 1 0 0 X; note 1
A
Am
SUBADDRESS; note 2
DATA
--------
P
RAM ADDRESS
S
S
S
S
S
Digital video encoder
1 0 0 0 1 0 0 0
1 0 0 0 1 0 0 0
1 0 0 0 1 0 0 0
I
2
1 0 0 0 1 0 0 0
C-bus format
1 0 0 0 1 0 0 0
2
2
2
2
2
2
CODE
C-bus write access to control registers; see Table 22
C-bus write access to the HD line count array (subaddress D0H); see Table 22
C-bus write access to cursor bit map (subaddress FEH); see Table 22
C-bus write access to colour look-up table (subaddress FFH); see Table 22
C-bus read access to control registers; see Table 22
C-bus read access to cursor bit map or colour LUT; see Table 22
A FFH A
A
A D0H A
FFH
or
A
SUBADDRESS
START condition
repeated START condition
slave address
acknowledge generated by the slave
acknowledge generated by the master
subaddress byte
data byte
continued data bytes and acknowledges
STOP condition
start address for RAM access
A
A RAM ADDRESS A Sr 1 0 0 0 1 0 0 1 A DATA 0 Am -------- DATA n Am P
FEH
RAM ADDRESS
RAM ADDRESS
SUBADDRESS
A
A Sr
RAM ADDRESS
1 0 0 0 1 0 0 1
A
28
A
DATA 0R
A
DATA 00
DESCRIPTION
DATA 0
A
A
A
DATA 0
A
DATA 0
DATA 0G
DATA 01
A
SAA7104H; SAA7105H
A
Am
--------
A
A
--------
--------
DATA 0B
--------
Product specification
DATA n
DATA n
DATA n
DATA n
A
--------
A
Am P
A
A P
P
P
P
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