SAA7129H NXP Semiconductors, SAA7129H Datasheet

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SAA7129H

Manufacturer Part Number
SAA7129H
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA7129H

Adc/dac Resolution
10b
Screening Level
Commercial
Package Type
PQFP
Pin Count
44
Lead Free Status / RoHS Status
Compliant

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1. General description
2. Features
The SAA7128H; SAA7129H encodes digital C
SECAM CVBS or S-video signal. Simultaneously, RGB or bypassed but interpolated
C
multiplexed digital D1 input port accepts two ITU-R BT.656 compatible C
streams with 720 active pixels per line in 4 : 2 : 2 multiplexed formats, for example MPEG
decoded data with overlay and MPEG decoded data without overlay, where one data
stream is latched at the rising clock edge and the other at the falling clock edge.
It includes a sync/clock generator and on-chip DACs.
R
-Y-C
SAA7128H; SAA7129H
Digital video encoder
Rev. 03 — 9 December 2004
Monolithic CMOS 3.3 V device, 5 V I
Digital PAL/NTSC/SECAM encoder
System pixel frequency 13.5 MHz
54 MHz double-speed multiplexed D1 interface capable of splitting data into two
separate channels (encoded and baseband)
Three Digital-to-Analog Converters (DACs) for CVBS (CSYNC), VBS (CVBS) and C
(CVBS) two times oversampled with 10-bit resolution (signals in brackets optional)
Three DACs for RED (C
9-bit resolution (signals in brackets optional)
An advanced composite sync is available on the CVBS output for RGB display
centering
Real-time control of subcarrier
Cross-color reduction filter
Closed captioning encoding and World Standard Teletext (WST) and North-American
Broadcast Text System (NABTS) teletext encoding including sequencer and filter
Copy Generation Management System (CGMS) encoding (CGMS described by
standard CPR-1204 of EIAJ); 20 bits in lines 20/283 (NTSC) can be loaded via I
Fast I
Line 23 Wide Screen Signalling (WSS) encoding
Video Programming System (VPS) data encoding in line 16 (50/625 lines counting)
Encoder can be master or slave
Programmable horizontal and vertical input synchronization phase
Programmable horizontal sync output phase
Internal Color Bar Generator (CBG)
B
signals are available via three additional DACs. The circuit at a 54 MHz
2
C-bus control port (400 kHz)
R
), GREEN (Y) and BLUE (C
2
C-bus optional
R
-Y-C
B
video data to an NTSC, PAL or
B
) two times oversampled with
Product data sheet
R
-Y-C
B
data
2
C-bus

Related parts for SAA7129H

SAA7129H Summary of contents

Page 1

... SAA7128H; SAA7129H Digital video encoder Rev. 03 — 9 December 2004 1. General description The SAA7128H; SAA7129H encodes digital C SECAM CVBS or S-video signal. Simultaneously, RGB or bypassed but interpolated C -Y-C R multiplexed digital D1 input port accepts two ITU-R BT.656 compatible C streams with 720 active pixels per line multiplexed formats, for example MPEG decoded data with overlay and MPEG decoded data without overlay, where one data stream is latched at the rising clock edge and the other at the falling clock edge ...

Page 2

... Ordering information Package Name Description QFP44 plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 10 1.75 mm Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder Conditions Min 3.15 3.0 [ DDD TTL compatible 1 ...

Page 3

... RESET_N SDA SCL DD(I2C C-BUS 21 SAA7128H INTERFACE SA SAA7129H 2 I C-bus control MP pos MP7 to MP0 SWITCH MP neg C-bus control 44 TTX SSD1 SSD2 SSD3 DDD1 Fig 1. Block diagram XTALI XTALO RCV1 RCV2 TTXRQ XCLK SYNC/CLOCK clock and timing 2 I C-bus control C-bus control ...

Page 4

... VS/FS/FSEQ signal raster control 2 for video port; this pin provides an HS pulse of programmable length or receives an HS pulse Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder 33 V SSA3 32 ...

Page 5

... C-bus) with inactive output path 2 serial data input/output (I C-bus) teletext request output, indicating when text bits are requested teletext bit stream input Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder 2 C-bus supply ) and C (CVBS) outputs R ) and CVBS (CSYNC) outputs B ...

Page 6

... As a further alternative, the VBS and C outputs may provide a second and third CVBS signal also possible to connect a Philips digital video decoder (SAA7111A, SAA7113 or SAA7118) to the SAA7128H; SAA7129H. Via the RTCI pin, connected to RTCO of a decoder, information concerning actual subcarrier, PAL-ID and definite subcarrier phase can be inserted. ...

Page 7

... MP . The resulting output of the fader is then encoded could be an overlay (menu) signal to be faded smoothly Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder and MP via a cross switch controlled by EDGE1 B MP EDGE1 = EDGE2 = 1 ...

Page 8

... RGB output, assuming e.g. it contains video including B is equivalently passed through the inactive fader to the composite (and A MP FADER BYPASS Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder e.g. ENCODER video PATH recorder e.g. TV RGB PATH mhb575 ...

Page 9

... S-video) and RGB encoded B ENCODER RGB PATH B In1) + [(1 FADEx) Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder e.g. video recorder PATH e.g. TV mhb578 In2] © Koninklijke Philips Electronics N.V. 2004. All rights reserved ...

Page 10

... Product data sheet and Figure 11. Appropriate transients at start/end of active video and for and Figure 9. Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder © Koninklijke Philips Electronics N.V. 2004. All rights reserved ...

Page 11

... After HF pre-emphasis, line-by-line sequential carriers with black reference of 4.25 MHz (Db) and 4.40625 MHz (Dr) are generated reference carrier (anti-Cloche filter; see Figure 16 9397 750 14325 Product data sheet SAA7128H; SAA7129H and C signals are de-matrixed, individual gain adjustment for Y and color B R Figure 14 ...

Page 12

... AND’ configuration with other 3-state outputs and can also be used as a power-save mode. 7.7 Synchronization The synchronization of the SAA7128H; SAA7129H is able to operate in two modes; slave mode and master mode. In master mode, see signal itself, and it can provide timing signals at the RCV1 and RCV2 ports ...

Page 13

... RCV1, this is mandatory also possible to set the signal path to blank via this input. From the ITU-R BT.656 data stream, the SAA7128H; SAA7129H decodes only the start of the first line in the odd field. All other information is ignored and may miss. If this kind of slave mode is active, the RCV pins may be switched to output mode ...

Page 14

... Philips Semiconductors 7.10 Input levels and formats The SAA7128H; SAA7129H expects digital Y, C accordance with ITU-R BT.601 . For C and CVBS outputs, deviating amplitudes of the color difference signals can be compensated by an independent gain control setting, while gain for luminance is set to predefined values, distinguishable for 7.5 IRE set-up or without set-up. ...

Page 15

Bit allocation map Table 6: Slave receiver (slave address 88h) Register function Subaddress Status byte (read only) 00h Null 01h to 25h Wide screen signal 26h Wide screen signal 27h Real-time control, burst start 28h Burst end 29h Copy ...

Page 16

Table 6: Slave receiver (slave address 88h) …continued Register function Subaddress Fade factor other 50h Look-up table key color 2 U 51h Look-up table key color 2 V 52h Look-up table key color 2 Y 53h VPS enable, input control ...

Page 17

Table 6: Slave receiver (slave address 88h) …continued Register function Subaddress Trigger control 6Ch Trigger control 6Dh Multi control 6Eh Closed caption, teletext enable 6Fh RCV2 output start 70h RCV2 output end 71h MSBs RCV2 output 72h TTX request H ...

Page 18

... WSS12 WSS11 WSS10 wide screen signalling bits: subtitles field WSS9 WSS8 Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder ACK DATA 0 ACK -------- DATA n ACK P [1] © Koninklijke Philips Electronics N.V. 2004. All rights reserved ...

Page 19

... CGEN 0 = copy generation data output is disabled; default state after reset copy generation data output is enabled. - these 3 bits are reserved; each must be set to logic Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder © Koninklijke Philips Electronics N.V. 2004. All rights reserved ...

Page 20

... GCD[4:0] gain color difference of RGB ( depending on external application Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder , Y and C ) output, ranging from suggested nominal value = 6 (11010b and C ) output, ranging from suggested nominal value = 6 (11010b), © ...

Page 21

... MPEG port are added together according to the equation: FADE2 video signal + (1 KEY2UV[7:0] Default value of all bytes after reset = 80h. KEY2UY[7:0] Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder FADE1) MPEG signal FADE2) LUT values © Koninklijke Philips Electronics N.V. 2004. All rights reserved. ...

Page 22

... LUTV[7:0] LUT for the color values inserted in case of key color 2 V detection in the MPEG input data stream; LUTV[7:0] = 80h; default value after reset Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder © Koninklijke Philips Electronics N.V. 2004. All rights reserved. ...

Page 23

... VPS12[7:0] twelfth byte of video programming system data in line 16; LSB first Subaddress 58h Symbol Description VPS13[7:0] thirteenth byte of video programming system data in line 16; LSB first Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder input data; fader is bypassed; default B input data; fader is bypassed; default state B Section © ...

Page 24

... Encoding GAINV = 1.55 output subcarrier of V contribution = 0 output subcarrier of V contribution = nominal GAINV = 1.46 output subcarrier of V contribution = 0 output subcarrier of V contribution = nominal Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder nominal to +2.16 nominal nominal to +2.04 nominal nominal to +1.55 nominal nominal to +1 ...

Page 25

... BLNNL = 46 (2Eh) [2] output blanking level = 25 IRE [2] output blanking level = 45 IRE [3] recommended value: BLNNL = 53 (35h) [3] output blanking level = 26 IRE Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder Table 40 Table 42 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. signal; B Figure 22. signal; ...

Page 26

... SECAM SECAM encoding; default state after reset SECAM encoding activated; bit PAL has to be set to logic 0. Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder Figure 10 black 100 IRE; default state after reset, black 92.5 IRE including 7.5 IRE set-up of © ...

Page 27

... Description FSC[07:00] these 4 bytes are used to program the subcarrier frequency; FSC[31:24] is the most significant byte, FSC[07:00] is the least significant byte: Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder Figure 22. © Koninklijke Philips Electronics N.V. 2004. All rights reserved ...

Page 28

... RCV1 port (at bit SYMP = LOW) or from decoded frame sync of ITU-R BT.656 input (at bit SYMP = HIGH); default state after reset horizontal synchronization is taken from RCV2 port (at bit SYMP = LOW). Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder 32 [1] 2 Table 54 © ...

Page 29

... Reference mark: analog output horizontal sync (leading slope) coincides with active edge of RCV used for triggering at HTRIG[10:0] = 4Fh (79). Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder Table 56. Values above 1715 (FISE = 1) or © Koninklijke Philips Electronics N.V. 2004. All rights reserved. ...

Page 30

... Luminance path delay 0 no luminance delay; default value after reset 1 1 LLC luminance delay 0 2 LLC luminance delay 1 3 LLC luminance delay Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder Table 59 Table 60 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Table ...

Page 31

... RCV2 pin; the 3 MSBs of the 11-bit code are held at subaddress 72h; see or 1727 (FISE = 0) are not allowed; leading sync slope at CVBS output coincides with trailing slope of RCV2 out at RCV2E = 49h Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder Table 62 Table 65; values above 1715 (FISE = 1) Table 65 ...

Page 32

... TTXRQ in odd field. The MSB is held in subaddress 7Ch; see line = (TTXOVS[8: for M-systems line = (TTXOVS[8: for other systems. Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder Figure 23: Table 75: © Koninklijke Philips Electronics N.V. 2004. All rights reserved. ...

Page 33

... These are the 8 LSBs of the 9-bit code that determines the last active line. The MSB is held in subaddress 7Ch; see coincides with the first field synchronization pulse: last active line = (LAL[8: for M-systems last active line = LAL[8:0] for other systems. Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder Table 75: Table 75: ...

Page 34

... LINE[20:13] Individual lines in both fields (PAL counting) can be disabled for insertion of teletext by the respective LINE bits. Disabled line = LINEnn (50 Hz field rate). This bit mask is effective only, if the lines are enabled by TTXOVS/TTXOVE and TTXEVS/TTXEVE. Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder Table 74 Figure 23; default state after reset, Figure 23 ...

Page 35

... NTSC = 4 fields, PAL = 8 fields, SECAM = 12 fields not first field of a sequence. O_E 1 = during even field during odd field (1) ( Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder © Koninklijke Philips Electronics N.V. 2004. All rights reserved. mbe737 14 f (MHz ...

Page 36

... CCRS1 = 0; CCRS0 = 0 Fig 10. Luminance transfer characteristic 1 9397 750 14325 Product data sheet (dB 0.4 6 (4) v ( Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder mbe735 (1) (2) 0.8 1.2 1.6 f (MHz) ( © Koninklijke Philips Electronics N.V. 2004. All rights reserved. mgd672 14 f (MHz ...

Page 37

... CCRS1 = 0; CCRS0 = 0 Fig 11. Luminance transfer characteristic 2 G (dB) Fig 12. Luminance transfer characteristic in RGB 9397 750 14325 Product data sheet (dB Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder mbe736 ( (MHz © Koninklijke Philips Electronics N.V. 2004. All rights reserved. mgb708 14 f (MHz ...

Page 38

... Fig 13. Color difference transfer characteristic in RGB G (dB) Fig 14. Gain of SECAM pre-emphasis 9397 750 14325 Product data sheet 0.4 Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder 0.8 1.2 f (MHz) © Koninklijke Philips Electronics N.V. 2004. All rights reserved. mgb706 14 f (MHz) mgb705 1 ...

Page 39

... Fig 15. Phase of SECAM pre-emphasis G (dB) Fig 16. Gain of SECAM anti-Cloche 9397 750 14325 Product data sheet 0 0.4 Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder 0.8 1.2 f (MHz) 0.8 1.2 f (MHz) © Koninklijke Philips Electronics N.V. 2004. All rights reserved. mgb704 1.6 mgb703 1 ...

Page 40

... Fig 18. Sync and video input timing 9397 750 14325 Product data sheet 0.4 CVBS output RCV2 input 79 LLC MP input Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder 0.8 1.2 f (MHz) 82 LLC mhb579 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. mgb702 1 ...

Page 41

... To minimize the effective R th(j-a) connected to the power and ground layers directly. An ample copper area directly under the SAA7128H; SAA7129H with several through-hole platings, which connect to the ground layer (four-layer board: second layer), can also reduce the effective R not use any solder-stop varnish under the chip ...

Page 42

... HD;DAT Crystal oscillator f nominal frequency (usually n 27 MHz) f/f permissible deviation of nominal n frequency Crystal specification T ambient temperature amb 9397 750 14325 Product data sheet SAA7128H; SAA7129H Conditions Min 3.15 3.0 [ DDD 0.5 2.0 - clocks - data ...

Page 43

... For full digital range, without load, V [5] Referring to peak-to-peak analog voltages resulting from identical peak-to-peak digital codes. 9397 750 14325 Product data sheet Conditions 3.3 V. The typical minimum output voltage (digital zero at DAC) is 0.2 V. DDA Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder Min Typ Max ...

Page 44

... If the reset bit is enabled (RTCE = 1; DECPH = 1; PHRES = 00), the phase of the subcarrier is reset in each line whenever the reset bit of RTCI input is set to logic 1. • If the FISE bit is enabled (RTCE = 1; DECFIS = 1), the SAA7128H; SAA7129H takes this bit instead of the FISE bit in subaddress 61h. 9397 750 14325 ...

Page 45

... Philips Semiconductors • If the odd/even bit is enabled (RTCE = 1; DECOE = 1), the SAA7128H; SAA7129H ignores its internally generated odd/even flag and takes the odd/even bit from RTCI input. • If the color detection bit is enabled (RTCE = 1; DECCOL = 1) and no color was detected (color detection bit = 0), the subcarrier frequency is generated by the SAA7128H ...

Page 46

... TTXRQ in is the internally used insertion window for TTX data; it has a constant length Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder = 9.78 s (PAL 10.5 s (NTSC) TTX TTX t i(TTXW © Koninklijke Philips Electronics N.V. 2004. All rights reserved. 24 mhb504 ...

Page 47

... MHz 1 nF for each V X1 3rd harmonic V DDD1 XTALI XTALO 17, 39 digital SAA7128H inputs and SAA7129H outputs (1) Typical value. 100 (2) For color bar. 100 Fig 24. Application circuit 3.3 V analog 0.1 F 0.1 F DGND AGND use one capacitor 0.1 F for each V ...

Page 48

... Product data sheet Table 82 Digital output signals conversion range Ordering information Y (VBS) sync-tip to white (digits) 881 Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder 100 for a color bar signal. 100 load. RGB (Y) black to white at GDY = GDC = 6 (digits) 712 © ...

Page 49

... 2.5 scale (1) ( 0.4 0.25 10.1 10.1 12.9 0.8 0.2 0.14 9.9 9.9 12.3 REFERENCES JEDEC JEITA Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder detail 12.9 0.95 1.3 0.15 0.15 0.1 12.3 0.55 EUROPEAN PROJECTION © Koninklijke Philips Electronics N.V. 2004. All rights reserved. ...

Page 50

... For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; 9397 750 14325 Product data sheet SAA7128H; SAA7129H 2 called small/thin packages. Rev. 03 — 9 December 2004 ...

Page 51

... LBGA, LFBGA, SQFP, [3] , TFBGA, VFBGA, XSON , SO, SOJ [8] [9] [8] , PMFP , WQCCN.. measured in the atmosphere of the reflow oven. The package Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder Soldering method Wave not suitable [4] not suitable suitable [5] [6] not recommended [7] not recommended not suitable © ...

Page 52

... The appropriate soldering profile can be provided on request. [9] Hot bar soldering or manual soldering is suitable for PMFP packages. 9397 750 14325 Product data sheet SAA7128H; SAA7129H Rev. 03 — 9 December 2004 Digital video encoder © Koninklijke Philips Electronics N.V. 2004. All rights reserved ...

Page 53

... Added Table 79 “Limiting values” Updated Table 80 “Thermal characteristics” Changed the type number of some referenced ICs. Product specification Product specification Rev. 03 — 9 December 2004 SAA7128H; SAA7129H Digital video encoder Change Doc. number Supersedes notice - 9397 750 14325 SAA7128H_7129H_2 ...

Page 54

... For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com 9397 750 14325 Product data sheet SAA7128H; SAA7129H [2] [3] Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. ...

Page 55

... Teletext timing . . . . . . . . . . . . . . . . . . . . . . . . . 46 11 Application information 11.1 Analog output voltages . . . . . . . . . . . . . . . . . . 48 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 49 13 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 13.1 Introduction to soldering surface mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 SAA7128H; SAA7129H 13.2 Reflow soldering 13.3 Wave soldering 13.4 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 51 13.5 Package related soldering information . . . . . . 51 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . 53 15 Data sheet status Defi ...

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