SAA7191BWP/04,512 NXP Semiconductors, SAA7191BWP/04,512 Datasheet - Page 19

SAA7191BWP/04,512

Manufacturer Part Number
SAA7191BWP/04,512
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA7191BWP/04,512

Screening Level
Commercial
Lead Free Status / RoHS Status
Supplier Unconfirmed
Philips Semiconductors
Notes
1. Data output signals are Y7 to Y0 and UV7 to UV0. All others are control output signals.
2. Levels are measured with load circuit. YUV-bus, HREF and VS outputs with 1.2 k in parallel to 50 pF at 3 V (TTL
3. t
August 1996
SYMBOL
Timing of YUV-bus and control outputs
t
t
t
t
t
Chrominance PLL
f
Crystal oscillator
f
X1
Line locked clock input LLC (pin 27)
t
t
t
t
OH
OS
SZ
ZS
RTCO
C
n
LLC
p
r
f
f / f
Digital Multistandard Colour Decoder,
Square Pixel (DMSD-SQP)
load); LFCO output with 10 k in parallel to 15 pF and other outputs with 1.2 k in parallel to 25 pF at 3 V (TTL load).
SU
n
, t
HD
, t
output signal hold time
output set-up time
data output disable transition time
data output enable transition time
RTCO timing
catching range
nominal frequency
permissible deviation f
temperature deviation from f
crystal specification:
cycle time
duty factor
rise time
fall time
OH
temperature range T
load capacitance C
series resonance resistance R
motional capacitance C
parallel capacitance C
Philips catalogue number
and t
OD
include t
PARAMETER
r
L
and t
n
amb
0
1
f
.
n
S
Fig.8
YUV, HREF, VS at
C
controls at C
YUV, HREF, VS at
C
controls at C
to 3-state condition
from 3-state condition
Fig.10
3rd harmonic
Fig.9
note 3
t
19
LLCH
L
L
= 15 pF
= 50 pF;
CONDITIONS
/ t
LLC
L
L
= 7.5 pF
= 25 pF
13
13
14
14
16
14
0
8
9922 520 30004
31
40
MIN.
400
Fig.8
26.8
50
1.1 20%
3.5 20%
TYP.
Product specification
SAA7191B
70
80
45
60
5
6
50
20
MAX.
UNIT
ns
ns
ns
ns
ns
ns
Hz
MHz
10
10
pF
fF
pF
ns
%
ns
ns
C
6
6

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