SAA7128AH/V1,557 NXP Semiconductors, SAA7128AH/V1,557 Datasheet - Page 31

• Manufacturer Part Number: SAA7128AH/V1,557
• Manufacturer: NXP Semiconductors

Specifications of SAA7128AH/V1,557

• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
Table 56 Selection of luminance path delay
Table 57 Selection of field length control
Table 58 Subaddress 6FH
Table 59 Selection of line 21 encoding
Table 60 Subaddress 70H
2003 Dec 09
Digital video encoder
CCEN1
LDEL1
FLC1
7 to 0
BIT
BIT
0
0
1
1
0
0
1
1
7
6
5
4
3
2
1
0
0
0
1
1
RCV2S[7:0]
SYMBOL
SYMBOL
SCCLN4
SCCLN3
SCCLN2
SCCLN1
SCCLN0
CCEN1
CCEN0
CCEN0
TTXEN
LDEL0
FLC0
0
1
0
1
0
1
0
1
0
1
0
1
no luminance delay; default value after reset
1 LLC luminance delay
2 LLC luminance delay
3 LLC luminance delay
interlaced 312.5 lines/field at 50 Hz, 262.5 lines/field at 60 Hz; default value after reset
non-interlaced 312 lines/field at 50 Hz, 262 lines/field at 60 Hz
non-interlaced 313 lines/field at 50 Hz, 263 lines/field at 60 Hz
non-interlaced 313 lines/field at 50 Hz, 263 lines/field at 60 Hz
These 2 bits enable individual line 21 encoding; see Table 59.
0 = disables teletext insertion; default state after reset
1 = enables teletext insertion
These 5 bits select the actual line where closed caption or extended data are encoded.
line 21 encoding off; default value after reset
enables encoding in field 1 (odd)
enables encoding in field 2 (even)
enables encoding in both fields
These are the 8 LSBs of the 11-bit code that determines the start of the output signal
on the RCV2 pin; the 3 MSBs of the 11-bit code are held at subaddress 72H; see
Table 62. Values above 1715 (FISE = 1) or 1727 (FISE = 0) are not allowed. Leading
sync slope at CVBS output coincides with leading slope of RCV2 out at RCV2S = 49H.
line = (SCCLN[4:0] + 4) for M-systems
line = (SCCLN[4:0] + 1) for other systems
31
LUMINANCE PATH DELAY
LINE 21 ENCODING
DESCRIPTION
DESCRIPTION
DESCRIPTION
SAA7128AH; SAA7129AH
Product specification