ADV7174KCPZ Analog Devices Inc, ADV7174KCPZ Datasheet - Page 31

• Manufacturer Part Number: ADV7174KCPZ
• Manufacturer: Analog Devices Inc

Specifications of ADV7174KCPZ

• Adc/dac Resolution: 10b
• Screening Level: Commercial
• Package Type: LFCSP EP
• Pin Count: 40
• Lead Free Status / RoHS Status: Compliant

MODE REGISTER 3 (MR3)
Bits:
Address:
Mode Register 3 is an 8-bit-wide register. Figure 41 shows the various operations under the control of Mode Register 3.
Table 12. MR3 Bit Description
Bit Name
Revision Code
VBI Open
DAC Output
Chroma Output Select
Teletext Enable
TTXREQ Bit Mode Control
Input Default Color
Table 13. DAC Output Configuration Matrix
MR34
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
MR40
0
0
1
1
0
0
0
0
1
1
0
0
1
1
1
1
MR37–MR30
SR4–SR0 = 03H
MR37
MR41
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
INPUT DEFAULT
0
1
COLOR
DISABLE
ENABLE
MR37
Bit No.
MR30–MR31
MR32
MR33
MR34
MR35
MR36
MR37
MR36
0
1
MODE CONTROL
MR33
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
TTXREQ BIT
NORMAL
BIT REQUEST
MR36
MR35
Description
These bits are read-only and indicate the revision of the device.
This bit determines whether or not data in the vertical blanking interval (VBI) is output to
the analog outputs or blanked. VBI data insertion is not available in Slave Mode 0. Also,
when both BLANK input control and VBI open are enabled, BLANK input control has
priority, i.e., VBI data insertion will not work.
This bit is used to switch the DAC outputs from SCART to a EUROSCART configuration. A
complete list of all DAC output configurations is shown in Table 13.
With this active high bit it is possible to output an extra chrominance signal C, on DAC A
in any configuration that features a CVBS signal.
This bit enables switching of the Teletext request signal from a continuous high signal
(MR36 = 0) to a bitwise request signal (MR36 = 1).
This bit determines the default output color from the DACs for zero input pixel data (or
disconnected). A Logic 0 means that the color corresponding to 00000000 is displayed. A
Logic 1 forces the output color to black for 00000000 pixel input video data.
0
1
This bit must be set to 1 to enable Teletext data insertion on the TTX pin.
TELETEXT
ENABLE
DAC A
CVBS
Y
CVBS
Y
CVBS
G
CVBS
Y
C
Y
C
Y
C
G
C
Y
MR35
DISABLE
ENABLE
CHROMA OUTPUT
MR34
Figure 41. Mode Register 3
0
1
Rev. B | Page 31 of 52
SELECT
MR34
DISABLE
ENABLE
DAC B
CVBS
CVBS
CVBS
CVBS
B
B
Pb
Pb
CVBS
CVBS
CVBS
CVBS
B
B
Pb
Pb
MR33
0
1
COMPOSITE
GREEN/LUMA/Y
MR33
DAC A
DAC C
C
C
C
C
R
R
Pr
Pr
C
C
C
C
R
R
Pr
Pr
MR32
0
1
VBI_OPEN
MR32
DAC OUTPUT
DISABLE
ENABLE
BLUE/COMP/Pb
BLUE/COMP/Pb
DAC B
CVBS: Composite Video Baseband Signal
Y: Luminance Component Signal (For YPbPr or Y/C Mode)
C: Chrominance Signal (For Y/C Mode)
Pb: ColorComponent Signal (For YPbPr Mode)
Pr: Color Component Signal (For YPbPr Mode)
R: RED Component Video (For RGB Mode)
G: GREEN Component Video (For RGB Mode)
B: BLUE Component Video (For RGB Mode)
Each DAC can be powered on or off individually
See MR1 Description and Figure 39.
MR31
RED/CHROMA/Pr
RED/CHROMA/Pr
RESERVED
MR30
MR30
MR31
DAC C
ADV7174/ADV7179