ISP1301BS,151 NXP Semiconductors, ISP1301BS,151 Datasheet - Page 15

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ISP1301BS,151

Manufacturer Part Number
ISP1301BS,151
Description
RF Transceiver USB OTG TRANSCEIVER
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1301BS,151

Number Of Transceivers
1
Esd Protection
YeskV
Operating Supply Voltage (typ)
Not RequiredV
Operating Temperature Classification
Industrial
Operating Supply Voltage (max)
Not RequiredV
Operating Supply Voltage (min)
Not RequiredV
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Supply Voltage
1.65 V to 4.5 V
Lead Free Status / RoHS Status
Compliant
Other names
935273168151 ISP1301BS-S
Philips Semiconductors
Table 4:
[1]
ISP1301_3
Product data sheet
Mode
Direct I
Direct I
USB modes
USB suspend mode
USB functional mode
Transparent modes
Transparent
general-purpose buffer
mode
Transparent UART mode
Conditions:
a) bit SPD_SUSP_CTRL = 0 and pin SUSPEND = HIGH, or
b) bit SPD_SUSP_CTRL = 1 and bit SUSPEND_REG = 0.
2
2
C-bus mode
C-bus mode
Device operating modes
8.4.3 Summary tables
In UART mode, the OTG Controller is allowed to connect a UART to the DAT/VP and
SE0/VM pins of the ISP1301.
UART mode is entered by setting the UART_EN bit in the Mode Control 1 register. UART
mode is equivalent to one of transparent general purpose buffer mode (bit
TRANSP_BDIR1 = 1, bit TRANSP_BDIR0 = 0).
Table 5:
[1]
Pin
DP as output
DM as output
V
SCL
SDA
BUS
In USB suspend mode, the ISP1301 can drive the DP and DM lines, if the OE_N/INT_N input (when the
OE_INT_EN bit is not set) is LOW. In such a case, these outputs are driven as in USB functional modes,
but with the full-speed characteristics, irrespective of the value of the SPEED input pin or the SPEED_REG
bit.
USB
suspend
condition
X
X
X
1
0
X
X
USB suspend mode: I/O
[1]
Function
can be driven if pin OE_N/INT_N is active LOW, otherwise high-Z
can be driven if pin OE_N/INT_N is active LOW, otherwise high-Z
can be driven depending on bit VBUS_DRV
connected to SCL I/O of the I
connected to SDA I/O of the I
Bit
DAT
_SE0
X
X
1
X
X
1
X
Rev. 03 — 21 February 2006
Pin
OE_N/
INT_N
X
HIGH
X
X
X
X
X
Bit
TRANSP
_EN
0
1
1
0
0
1
X
2
2
C-bus slave
C-bus slave
Bit
UART
_ EN
X
X
X
0
0
0
1
Description
-
see
ATX is fully functional; see
ATX is not functional; see
DAT/VP
SE0/VM
ATX is not functional
Table 5
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
DP (RxD signal of UART)
DM (TxD signal of UART);
and
USB OTG transceiver
Table 7
ISP1301
Table 8
[1]
[1]
Table 6
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