ISP1507CBS STEricsson, ISP1507CBS Datasheet - Page 20

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ISP1507CBS

Manufacturer Part Number
ISP1507CBS
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1507CBS

Lead Free Status / RoHS Status
Supplier Unconfirmed
NXP Semiconductors
ISP1507C_ISP1507D_1
Product data sheet
If a crystal is attached or a clock is driven into the XTAL1 pin, the ISP1507 will drive a
60 MHz clock out from the CLOCK pin when DIR deasserts. This is shown as CLOCK in
Figure
The recommended power-up sequence for the link is as follows:
The ULPI is ready for use.
1. The link waits for 1 ms, ignoring all the ULPI pin status.
2. The link may start to detect DIR status level. If DIR is detected as LOW for three clock
cycles, the link may send a RESET command.
4.
Rev. 01 — 28 May 2008
ULPI HS USB host and peripheral transceiver
ISP1507C; ISP1507D
© NXP B.V. 2008. All rights reserved.
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