SC16C2550BIA44-S NXP Semiconductors, SC16C2550BIA44-S Datasheet - Page 27

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SC16C2550BIA44-S

Manufacturer Part Number
SC16C2550BIA44-S
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SC16C2550BIA44-S

Transmit Fifo
16Byte
Receive Fifo
16Byte
Transmitter And Receiver Fifo Counter
Yes
Data Rate
5Mbps
Package Type
PLCC
Operating Supply Voltage (max)
5.5V
Mounting
Surface Mount
Pin Count
44
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Number Of Channels
2
Lead Free Status / RoHS Status
Compliant
NXP Semiconductors
Table 25.
T
[1]
[2]
[3]
[4]
SC16C2550B_5
Product data sheet
Symbol
t
t
N
28d
RESET
amb
Fig 8.
Applies to external clock, crystal oscillator max 24 MHz.
Maximum frequency =
RCLK is an internal signal derived from divisor latch LSB (DLL) and divisor latch MSB (DLM) divisor latches.
Reset pulse must happen when these signals are inactive: CS, IOW, IOR.
= 40 C to +85 C; tolerance of V
General write timing
CSA, CSB
Parameter
delay from start to reset
TXRDY
RESET pulse width
baud rate divisor
Dynamic characteristics
D0 to D7
A0 to A2
IOW
10.1 Timing diagrams
-------
t
w3
1
t
6s
t
13d
…continued
CC
Conditions
address
valid
10 %; unless otherwise specified.
active
active
t
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
13w
Rev. 05 — 12 January 2009
t
16s
data
t
[3]
[4]
t
16h
t
13h
6h
Min
200
V
1
-
CC
t
15d
= 2.5 V
(2
8T
Max
16
RCLK
-
1)
Min
40
V
1
-
CC
= 3.3 V
(2
8T
Max
16
RCLK
-
SC16C2550B
1)
Min
40
V
1
-
CC
© NXP B.V. 2009. All rights reserved.
002aae279
= 5.0 V
(2
8T
Max
16
RCLK
-
1)
27 of 43
Unit
s
ns

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