DP83934CVUL20 National Semiconductor, DP83934CVUL20 Datasheet - Page 34

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DP83934CVUL20

Manufacturer Part Number
DP83934CVUL20
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of DP83934CVUL20

Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
160
Lead Free Status / RoHS Status
Not Compliant
6 0 SONIC-T Registers
the SONIC-T is in software reset The CDA resides in the
same 64k byte block of memory as the Receive Resource
Area (RRA) and contains descriptors for loading the CAM
registers These descriptors are contiguous and each de-
scriptor consists of four 16-bit fields (Figure 6-2) In 32-bit
mode the upper word D
contains the value to be loaded into the CAM Entry Pointer
and the remaining fields are for the three CAM Address
Ports (see Section 6 3 10) In addition there is one more
field after the last descriptor containing the mask for the
CAM Enable register Each of the CAM descriptors are ad-
dressed by the CAM Descriptor Pointer (CDP) register
After the system has initialized the CDA it can issue the
Load CAM command to program the SONIC-T to read the
CDA and load the CAM The procedure for issuing the Load
CAM command is as follows
1 Initialize the Upper Receive Resource Address (URRA)
register Note that the CAM Descriptor Area must reside
within the same 64k page as the Receive Resource Area
(See Section 6 3 9 )
k
31 16
l
is not used The first field
(Continued)
FIGURE 6-2 CAM Descriptor Area Format
FIGURE 6-1 CAM Organization
34
2 Initialize the CDA as described above
3 Initialize the CAM Descriptor Count with the number of
4 Initialize the CAM Descriptor Pointer to locate the first
5 Issue the Load CAM command (LCAM) in the Command
If a transmission or reception is in progress the CAM DMA
function will not occur until these operations are complete
When the SONIC-T completes the Load CAM command
the CDP register points to the next location after the CAM
enable field and the CDC equals zero The SONIC-T resets
the LCAM bit in the Command register and sets the Load
CAM Done (LCD) bit in the ISR
CAM descriptors Note only the lower 5 bits are used in
this register The other bits are don’t cares (See Section
6 3 10 )
descriptor in the CDA This register must be reloaded
each time a new Load CAM command is issued
register (See Section 6 3 1 )
TL F 11719 – 27
TL F 11719– 26

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