SY89833ALMG Micrel Inc, SY89833ALMG Datasheet - Page 6

• Manufacturer Part Number: SY89833ALMG
• Description: 3.3V 1:4 PECL Fanout Buffer
• Manufacturer: Micrel Inc
• Series: Precision Edge®r
• Type: Fanout Buffer (Distribution), Translatorr

Specifications of SY89833ALMG

• Number Of Circuits: 1
• Ratio - Input:output: 1:4
• Differential - Input:output: Yes/Yes
• Input: CML, LVDS, LVPECL
• Output: LVDS
• Frequency - Max: 2GHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-MLF®, QFN
• Frequency-max: 2GHz
• Number Of Outputs: 8
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 85C
• Propagation Delay Time: 0.47ns
• Operating Supply Voltage (min): 3V
• Mounting: Surface Mount
• Pin Count: 16
• Operating Supply Voltage (typ): 3.3V
• Package Type: MLF EP
• Quiescent Current: 100mA
• Duty Cycle: 53%
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 576-3501-5

Micrel, Inc.
AC Electrical Characteristics
V
Notes:
7.
8.
9.
10. Set-up and hold times apply to synchronous applications that intend to enable/disable before the next clock cycle. For asynchronous applications,
11. Random jitter is measured with a K28.7 pattern, measured at ≤f MAX .
12. Deterministic jitter is measured at 2.5Gbps with both K28.5 and 2 23 –1 PRBS pattern.
13. Cycle-to-cycle jitter definition: The variation period between adjacent cycles over a random sample of adjacent cycle pairs. t JITTER_CC = T n –
14. Total jitter definition: with an ideal clock input frequency of ≤ f MAX (device), no more than one output edge in 10 12 output edges will deviate by
15. Integrated over the range of 12kHz to 20MHz.
Timing Diagrams
March 2009
Symbol
f
t
t
t
t
t
t
CC
MAX
PD
SKEW
S
H
JITTER
r,
t
f
High-frequency AC parameters are guaranteed by design and characterization.
Within device skew is measured between two different outputs under identical input transitions.
Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the respective
inputs.
set-up and hold times do not apply.
T n+1 , where T is the time between rising edges of the output signal.
more than the specified peak-to-peak jitter value.
= 3.3V ±10%, R
Parameter
Maximum Frequency
Propagation Delay
Within-Device Skew
Part-to-Part Skew
Set-Up Time
Hold Time
Data
Clock
Additive Phase Jitter
Output Rise/Fall Times
(20% to 80%)
Duty Cycle
Random Jitter (RJ)
Deterministic Jitter (DJ)
Cycle-to-Cycle Jitter
Total Jitter (TJ)
L
= 100Ω across the output, T
(7)
Condition
V
Note 8
Note 9
Note 10
Note 10
Note 11
Note 12
Note 13
Note 14
f = 622.08MHz, Note 15
f = 156.25MHz, Note 15
At full output swing.
Differential I/O
OUT
A
= –40°C to +85°C, unless otherwise noted.
≥ 200mV
6
[e-mail]
Min
250
400
400
2.0
60
47
0.07
Typ
110
5
0.635
or [phone]
Max
M9999-032609-A
470
200
190
53
20
10
10
1
1
SY89833AL
Units
ps
ps
ps
ps
GHz
ps
ps
ps
ps
ps
ps
ps
ps
%
RMS
RMS
RMS
RMS
PP
PP