STM32F100RET6B STMicroelectronics, STM32F100RET6B Datasheet - Page 81
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STM32F100RET6B
Manufacturer Part Number
STM32F100RET6B
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32F100RCT6TR.pdf
(97 pages)
Specifications of STM32F100RET6B
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
24MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
51
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM32F100RET6B
Manufacturer:
NXP
Quantity:
11 430
Company:
Part Number:
STM32F100RET6B
Manufacturer:
STMicroelectronics
Quantity:
10 000
Company:
Part Number:
STM32F100RET6BTR
Manufacturer:
STMicroelectronics
Quantity:
10 000
STM32F100xC, STM32F100xD, STM32F100xE
Table 51.
1. Preliminary values.
2. Guaranteed by design, not tested in production.
3. V
4. For external triggers, a delay of 1/f
t
Symbol
STAB
t
R
C
f
R
CONV
V
V
t
TRIG
I
t
V
CAL
t
f
ADC
ADC
VREF
f
latr
t
AIN
AIN
lat
REF+
ADC
S
S
DDA
REF+
(2)
(2)
(2)
(2)
(2)
(2)
(3)
(2)
(2)
(2)
(2)
(2)
is internally connected to V
Power supply
Positive reference voltage
Current on the V
pin
ADC clock frequency
Sampling rate
External trigger frequency
Conversion voltage range
External input impedance
Sampling switch resistance
Internal sample and hold
capacitor
Calibration time
Injection trigger conversion
latency
Regular trigger conversion
latency
Sampling time
Power-up time
Total conversion time
(including sampling time)
ADC characteristics
Equation 1: R
The above formula
error below 1/4 of LSB. Here N = 12 (from 12-bit resolution).
R
AIN
Parameter
<
------------------------------------------------------------- - R
f
ADC
REF
×
AIN
input
C
DDA
(Equation
PCLK2
ADC
max formula:
T
S
×
must be added to the latency specified in
ln
(
1) is used to determine the maximum external impedance allowed for an
2
See
Table 52
N
f
f
f
f
f
f
+
Doc ID 15081 Rev 5
ADC
ADC
ADC
ADC
ADC
ADC
2
Conditions
Equation 1
)
–
= 12 MHz
= 12 MHz
= 12 MHz
= 12 MHz
= 12 MHz
= 12 MHz
for details
ADC
and
14 to 252 (t
successive approximation)
0 (V
ground)
SSA
0.125
1.17
0.05
Min
2.4
2.4
0.6
1.5
Table
0
tied to
S
51.
for sampling +12.5 for
5.9
83
Electrical characteristics
160
Typ
0
(1)
V
220
0.214
0.143
239.5
V
Max
17.1
823
3
2
3.6
REF+
12
17
50
21
DDA
1
1
8
1
(4)
(4)
(1)
1/f
1/f
1/f
1/f
1/f
1/f
MHz
MHz
Unit
kHz
µA
kΩ
kΩ
pF
µs
µs
µs
µs
µs
µs
V
V
ADC
V
ADC
ADC
ADC
ADC
ADC
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