STK11C68-5K45M Cypress Semiconductor Corp, STK11C68-5K45M Datasheet - Page 2

• Manufacturer Part Number: STK11C68-5K45M
• Description: STK11C68-5K45M
• Manufacturer: Cypress Semiconductor Corp
• Type: NVSRAMr

Specifications of STK11C68-5K45M

• Format - Memory: RAM
• Memory Type: NVSRAM (Non-Volatile SRAM)
• Memory Size: 64K (8K x 8)
• Speed: 45ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -55°C ~ 125°C
• Package / Case: 28-CDIP (0.300", 7.62mm)
• Word Size: 8b
• Organization: 8Kx8
• Density: 64Kb
• Interface Type: Parallel
• Access Time (max): 45ns
• Operating Supply Voltage (typ): 5V
• Operating Temperature Classification: Military
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Operating Temp Range: -55C to 125C
• Pin Count: 28
• Mounting: Through Hole
• Supply Current: 65mA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Pinouts
Pin Definitions
Document Number: 001-51001 Rev. *A
Pin Name
DQ
A
0
V
V
WE
CE
OE
0
–A
SS
CC
-DQ
12
7
Figure 1. Pin Diagram - 28-Pin DIP
Alt
W
E
G
Power Supply Power Supply Inputs to the Device.
Input/Output Bidirectional Data I/O Lines. Used as input or output lines depending on operation.
I/O Type
Ground
Input
Input
Input
Input
Address Inputs. Used to select one of the 8,192 bytes of the nvSRAM.
Write Enable Input, Active LOW. When the chip is enabled and WE is LOW, data on the I/O
pins is written to the specific address location.
Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the
chip.
Output Enable, Active LOW. The active LOW OE input enables the data output buffers during
read cycles. Deasserting OE HIGH causes the I/O pins to tristate.
Ground for the Device. The device is connected to ground of the system.
Description
STK11C68-5 (SMD5962-92324)
Figure 2. Pin Diagram - 28-Pin LLC
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