SST89V58RD2-33-I-TQJE Microchip Technology, SST89V58RD2-33-I-TQJE Datasheet - Page 30

2.7V To 3.6V FlashFlex 8-bit 8051 Microcontroller 44 TQFP 10x10x1mm TRAY

SST89V58RD2-33-I-TQJE

Manufacturer Part Number
SST89V58RD2-33-I-TQJE
Description
2.7V To 3.6V FlashFlex 8-bit 8051 Microcontroller 44 TQFP 10x10x1mm TRAY
Manufacturer
Microchip Technology
Series
FlashFlex®r
Datasheet

Specifications of SST89V58RD2-33-I-TQJE

Core Processor
8051
Core Size
8-Bit
Speed
33MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
36
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
8K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP
Processor Series
FlashFlex51
Core
C51
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
5
Number Of Timers
3
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SST89V58RD2-33-I-TQJE
Manufacturer:
Microchip Technology
Quantity:
10 000
Data Sheet
Serial Port Control Register (SCON)
©2007 Silicon Storage Technology, Inc.
Location
98H
Symbol
FE
SM0
SM1
SM2
REN
TB8
RB8
TI
RI
SM0/FE
7
SM1
6
Function
Set SMOD0 = 1 to access FE bit.
0: No framing error
1: Framing Error. Set by receiver when an invalid stop bit is detected. This bit needs to
be cleared by software.
SMOD0 = 0 to access SM0 bit.
Serial Port Mode Bit 0
Serial Port Mode Bit 1
Enables the Automatic Address Recognition feature in Modes 2 or 3. If SM2 = 1 then RI
will not be set unless the received 9th data bit (RB8) is 1, indicating an address, and
the received byte is a given or broadcast address. In Mode 1, if SM2 = 1 then RI will not
be activated unless a valid stop bit was received. In Mode 0, SM2 should be 0.
Enables serial reception.
0: to disable reception.
1: to enable reception.
The 9th data bit that will be transmitted in Modes 2 and 3. Set or clear by software as
desired.
In Modes 2 and 3, the 9th data bit that was received. In Mode 1, if SM2 = 0, RB8 is the
stop bit that was received. In Mode 0, RB8 is not used.
Transmit interrupt flag. Set by hardware at the end of the 8th bit time in Mode 0, or at
the beginning of the stop bit in the other modes, in any serial transmission, Must be
cleared by software.
Receive interrupt flag. Set by hardware at the end of the8th bit time in Mode 0, or
halfway through the stop bit time in the other modes, in any serial reception (except see
SM2). Must be cleared by software.
1. f
SM0
0
0
1
1
OSC
= oscillator frequency
SM2
5
SM1
0
1
0
1
REN
4
30
Mode
TB8
0
1
2
3
3
SST89V54RD2/RD / SST89V58RD2/RD
Description
Shift Register
8-bit UART
9-bit UART
9-bit UART
RB8
2
Baud Rate
f
f
Variable
f
or
f
Variable
OSC
OSC
OSC
OSC
TI
1
/6 (6 clock mode) or
/12 (12 clock mode)
/32 or f
/64 or f
1
OSC
OSC
FlashFlex MCU
RI
0
/16 (6 clock mode)
/32 (12 clock mode)
S71255-10-000
Reset Value
00000000b
12/07

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