SST25VF064C-80-4C-Q2AE Microchip Technology, SST25VF064C-80-4C-Q2AE Datasheet - Page 18

• Manufacturer Part Number: SST25VF064C-80-4C-Q2AE
• Description: 2.7V To 3.6V 64Mbit SPI Serial Flash 8 TDFN 6x8x0.8mm TRAY
• Manufacturer: Microchip Technology

Specifications of SST25VF064C-80-4C-Q2AE

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 64M (8M x 8)
• Speed: 80MHz
• Interface: SPI Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-WDFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Data Sheet
Read-Status-Register (RDSR)
The Read-Status-Register (RDSR) instruction allows read-
ing of the status register. The status register may be read at
any time even during a Write (Program/Erase) operation.
When a Write operation is in progress, the Busy bit may be
checked before sending any new commands to assure that
Write-Enable (WREN)
The Write-Enable (WREN) instruction sets the Write-
Enable-Latch bit in the Status Register to ‘1’ allowing Write
operations to occur. The WREN instruction must be exe-
cuted prior to any Write (Program/Erase) operation. The
WREN instruction may also be used to allow execution of
©2010 Silicon Storage Technology, Inc.
FIGURE 16: Read-Status-Register (RDSR) Sequence
FIGURE 17: Write Enable (WREN) Sequence
SCK
CE#
SO
SI
MODE 3
MODE 0
MSB
0
1
HIGH IMPEDANCE
2
3
05
SCK
CE#
SO
4
SI
MODE 3
MODE 0
5
6
HIGH IMPEDANCE
MSB
0 1 2 3 4 5 6 7
7
18
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
MSB
8
the new commands are properly received by the device.
CE# must be driven low before the RDSR instruction is
entered and remain low until the status data is read. Read-
Status-Register is continuous with ongoing clock cycles
until it is terminated by a low to high transition of the CE#.
See Figure 16 for the RDSR instruction sequence.
the Write-Status-Register (WRSR) instruction; however,
the Write-Enable-Latch bit in the Status Register will be
cleared upon the rising edge CE# of the WRSR instruction.
CE# must be driven high before the WREN instruction is
executed.
06
9
10
1392 F18.0
64 Mbit SPI Serial Dual I/O Flash
Register Out
11
Status
12
13
14
1392 F17.0
SST25VF064C
S71392-04-000
04/10