S29PL064J70BFI120 Spansion Inc., S29PL064J70BFI120 Datasheet - Page 24

• Manufacturer Part Number: S29PL064J70BFI120
• Description: Flash Memory
• Manufacturer: Spansion Inc.

10.3
10.4
24
10.3.1
10.3.2
Writing Commands/Command Sequences
Standby Mode
Accelerated Program Operation
Autoselect Functions
To write a command or command sequence (which includes programming data to the device and erasing
sectors of memory), the system must drive WE# and CE# (CE1# or CE#2 in PL129J) to V
The device features an Unlock Bypass mode to facilitate faster programming. Once a bank enters the
Unlock Bypass mode, only two write cycles are required to program a word, instead of four.
Command Sequence on page 59
Unlock Bypass command sequences.
An erase operation can erase one sector, multiple sectors, or the entire device.
indicates the set of address space that each sector occupies. A “bank address” is the set of address bits
required to uniquely select a bank. Similarly, a “sector address” refers to the address bits required to uniquely
select a sector.
suspending/resuming the erase operation.
I
timing specification tables and timing diagrams in section
The device offers accelerated program operations through the ACC function. This function is primarily
intended to allow faster manufacturing throughput at the factory.
If the system asserts V
mode, temporarily unprotects any protected sectors, and uses the higher voltage on the pin to reduce the
time required for program operations. The system would use a two-cycle program command sequence as
required by the Unlock Bypass mode. Removing V
operation. Note that V
programming, or device damage may result. In addition, the WP#/ACC pin should be raised to V
in use. That is, the WP#/ACC pin should not be left floating or unconnected; inconsistent behavior of the
device may result.
If the system writes the autoselect command sequence, the device enters the autoselect mode. The system
can then read autoselect codes from the internal register (which is separate from the memory array) on
DQ15–DQ0. Standard read cycle timings apply in this mode. Refer to the
Addresses on page 41
When the system is not reading or writing to the device, it can place the device in the standby mode. In this
mode, current consumption is greatly reduced, and the outputs are placed in the high impedance state,
independent of the OE# input.
The device enters the CMOS standby mode when the CE# (CE1#,CE#2 in PL129J) and RESET# pins are
both held at V
PL129J) and RESET# are held at V
the standby current will be greater. The device requires standard access time (t
device is in either of these standby modes, before it is ready to read data.
If the device is deselected during erasure or programming, the device draws active current until the operation
is completed.
ICC3 in
CC2
in the DC Characteristics table represents the active current specification for the write mode. See the
DC Characteristics on page 73
IO
Command Definitions on page 57
± 0.3 V. (Note that this is a more restricted voltage range than V
HH
HH
and
must not be asserted on WP#/ACC for operations other than accelerated
on this pin, the device automatically enters the aforementioned Unlock Bypass
Autoselect Command Sequence on page 58
has details on programming data to the device using both standard and
IH
, but not within V
represents the CMOS standby current specification.
S29PL-J
D a t a
has details on erasing a sector or the entire chip, or
HH
from the WP#/ACC pin returns the device to normal
IO
S h e e t
± 0.3 V, the device will be in the standby mode, but
Reset on page 77
for more information.
S29PL-J_00_A12 December 18, 2009
Table 10.9, Secured Silicon Sector
for write operations.
CE
Table 10.4 on page 23
IH
) for read access when the
.) If CE# (CE1#,CE#2 in
IL
, and OE# to V
Word Program
CC
when not
IH
.