S29JL032J70TFI420 Spansion Inc., S29JL032J70TFI420 Datasheet - Page 62

• Manufacturer Part Number: S29JL032J70TFI420
• Description: IC 3V 32M SIMULTANEOUS READ/WRITE FLASH
• Manufacturer: Spansion Inc.

Specifications of S29JL032J70TFI420

• Cell Type: NOR
• Density: 32Mb
• Access Time (max): 70ns
• Interface Type: Serial
• Boot Type: Bottom
• Address Bus: 22/21Bit
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 4M/2M
• Supply Current: 16mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Supplier Unconfirmed

21. Revision History
62
Revision 01 (January 27, 2010)
Revision 02 (June 15, 2010)
Global
Product Selector Guide
Connection Diagrams
Pin Description
Ordering Information
Word/Byte Configuration
Secured Silicon Region
Command Definitions
Absolute Maximum Ratings
DC Characteristics
Test Conditions
Erase and Programming Performance
Physical Dimensions
Revision 03 (August 25, 2010)
Global
Simultaneous Read/Write Operations
with Zero Latency
Ordering Information
RESET#: Hardware Reset Pin
Secured Silicon Region
Common Flash Memory Interface (CFI)
Erase Suspend/Erase Resume
Commands
Erase and Programming Performance
Section
Initial release.
Changed all references to typical Sector Erase time from 0.4 sec to 0.5 sec.
Changed all references to “Secured Silicon Sector” to “Secured Silicon Region”.
Corrected spelling and grammatical errors.
Corrected Standard Voltage Range of 70 ns option from 3.0-3.6V to 2.7-3.6V.
Added 48-ball FBGA connection diagram.
Changes “21 Addresses” to “21 Address Pins”.
Added clarification that CE#, OE#, WE#, BYTE#, and RY/BY# are Active Low.
Added FBGA ordering option.
Added Low-halogen, Pb-free ordering option.
Added valid combinations for FBGA.
Added clarification that BYTE# must be connected to either the system V
Added clarification that D7 is the Secured Silicon Factory Indicator Bit.
In Figure Secured Silicon Sector Protect Verify, corrected “Write reset command” to “Secured
Silicon Region exit command”.
Corrected “Writing specific addresses and data commands or sequences” to “Writing specific
addresses and data sequences”.
Corrected “A9, OE#, and RESET#” to “A9 and RESET#”.
Removed OE# from I
Removed OE# = 12.5V from I
Added 1 MHz to I
Removed Note 1 from I
Update Figure “Test Setup” to reflect correct test setup.
Added Note 1 to clarify that input rise and fall times are 0-100%.
Changed Chip Erase typical time from 28 sec to 39 sec.
Removed Note 5.
Added VBK048 package outline drawing.
Updated the data sheet designation from Advanced Information to Preliminary.
Corrected spelling, capitalization, and grammatical errors.
Clarified that JL032J can be configured as either a top or bottom boot sector device, not both.
Corrected typo in valid combinations table from “…, 41, 41” to “…, 41, 42”.
Clarified that Note 1 applies to the Packing Type column.
Changed “Refer to AC Characteristics on page 48” to “Refer to Hardware Reset (RESET#) on page
49”.
Clarified the Secured Silicon Indicator Bit data based on factory and customer lock status.
Removed forward looking statements regarding factory locking features as they are supported in
this device.
Clarified that once in the CFI query mode, the system must write the reset command to return to
reading array data.
Added clarification that “It is not recommended to program the Secured Silicon Region after an
erase suspend, as proper device functionality cannot be guaranteed.”
Added Note 5 regarding minimum program and erase cycle endurance.
D a t a
CC6
LIT
and I
S29JL032J
CC6
parameter description.
S h e e t
CC7
and I
LIT
test conditions.
CC7
test conditions.
.
( P r e l i m i n a r y )
Description
S29JL032J_00_03 August 25, 2010
CC
or ground.