S29JL032H70TFI020 Spansion Inc., S29JL032H70TFI020 Datasheet - Page 44

• Manufacturer Part Number: S29JL032H70TFI020
• Description: IC,EEPROM,NOR FLASH,2MX16/4MX8,CMOS,TSSOP,48PIN,PLASTIC
• Manufacturer: Spansion Inc.

Specifications of S29JL032H70TFI020

• Data Bus Width: 8 bit, 16 bit
• Architecture: Boot Sector
• Interface Type: Conventional
• Access Time: 70 ns
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Current: 2 mA
• Mounting Style: SMD/SMT
• Memory Type: Flash
• Memory Size: 32 Mbit
• Operating Temperature: + 85 C
• Package / Case: TSOP-48
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Notes:
1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further
3. When reading write operation status bits, the system must always provide the bank address where the Embedded
44
Standard
Suspend
Erase
limits. Refer to the section on DQ5 for more information.
details.
Algorithm is in progress. The device outputs array data if the system addresses a non-busy bank.
Mode
Mode
Embedded Program Algorithm
Embedded Erase Algorithm
Erase-Suspend-Program
Erase-Suspend-
apply to the chip erase command.) If additional sectors are selected for erasure,
the entire time-out also applies after each additional sector erase command.
When the time-out period is complete, DQ3 switches from a “0” to a “1.” If the
time between additional sector erase commands from the system can be as-
sumed to be less than 50 µs, the system need not monitor DQ3. See also the
Sector Erase Command Sequence section.
After the sector erase command is written, the system should read the status of
DQ7 (Data# Polling) or DQ6 (Toggle Bit I) to ensure that the device has accepted
the command sequence, and then read DQ3. If DQ3 is “1,” the Embedded Erase
algorithm has begun; all further commands (except Erase Suspend) are ignored
until the erase operation is complete. If DQ3 is “0,” the device will accept addi-
tional sector erase commands. To ensure the command has been accepted, the
system software should check the status of DQ3 prior to and following each sub-
sequent sector erase command. If DQ3 is high on the second status check, the
last command might not have been accepted.
Table
Read
Status
14
shows the status of DQ3 relative to the other status bits.
Erase
Suspended Sector
Non-Erase
Suspended Sector
Table 14. Write Operation Status
A D V A N C E
(Note 2)
DQ7#
DQ7#
DQ7
Data
0
1
S29JL032H
No toggle
Toggle
Toggle
Toggle
DQ6
Data
I N F O R M A T I O N
(Note 1)
DQ5
Data
0
0
0
0
DQ3
Data
N/A
N/A
N/A
1
(Note 2)
No toggle
Toggle
Toggle
DQ2
Data
N/A
S29JL032HA0 May 21, 2004
RY/BY#
0
0
1
1
0