PIC32MX564F128HT-I/MR Microchip Technology, PIC32MX564F128HT-I/MR Datasheet - Page 101
![64 PINS, 128KB Flash, 32KB RAM, 80 MHz, USB, CAN, 4 DMA 64 QFN 9x9x0.9mm T/R](/photos/12/13/121325/c04-149_mr_sml.jpg)
PIC32MX564F128HT-I/MR
Manufacturer Part Number
PIC32MX564F128HT-I/MR
Description
64 PINS, 128KB Flash, 32KB RAM, 80 MHz, USB, CAN, 4 DMA 64 QFN 9x9x0.9mm T/R
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.PIC32MX575F256H-80IMR.pdf
(254 pages)
Specifications of PIC32MX564F128HT-I/MR
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Processor Series
PIC32MX5x
Core
MIPS32
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
53
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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- Download datasheet (6Mb)
TABLE 4-41:
Legend:
Note
0200
0210 RTCALRM
0220 RTCTIME
0230 RTCDATE
0240 ALRMTIME
0250 ALRMDATE
RTCCON
1:
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See
information.
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
RTCC REGISTER MAP
ALRMEN
31/15
ON
—
—
—
CHIME
30/14
FRZ
—
—
—
YEAR10<3:0>
SEC10<3:0>
SEC10<3:0>
DAY10<3:0>
DAY10<3:0>
HR10<3:0>
HR10<3:0>
29/13
SIDL
PIV
—
—
—
(1)
ALRMSYNC
28/12
—
—
—
—
27/11
—
—
—
—
26/10
—
—
—
YEAR01<3:0>
—
AMASK<3:0>
SEC01<3:0>
SEC01<3:0>
DAY01<3:0>
DAY01<3:0>
HR01<3:0>
HR01<3:0>
25/9
—
—
—
24/8
—
—
—
Bits
RTSECSEL RTCCLKON
23/7
—
—
—
—
—
MONTH10<3:0>
MONTH10<3:0>
22/6
—
—
—
—
—
MIN10<3:0>
MIN10<3:0>
21/5
—
—
—
—
—
—
CAL<9:0>
Section 12.1.1 “CLR, SET and INV Registers”
20/4
—
—
—
—
—
—
ARPT<7:0>
RTCWREN RTCSYNC HALFSEC
19/3
—
—
—
18/2
MONTH01<3:0>
MONTH01<3:0>
WDAY01<3:0>
WDAY01<3:0>
—
—
—
MIN01<3:0>
MIN01<3:0>
17/1
—
—
—
for more
RTCOE
16/0
—
—
—
0000
0000
0000
0000
xxxx
xx00
xxxx
xx00
xxxx
xx00
00xx
xx0x
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