PIC24HJ64GP204T-I/PT Microchip Technology, PIC24HJ64GP204T-I/PT Datasheet - Page 23
![16-bit MCU, 64KB Flash,DMA,40 MIPS,nanoWatt 44 TQFP 10x10x1mm T/R](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC24HJ64GP204T-I/PT
Manufacturer Part Number
PIC24HJ64GP204T-I/PT
Description
16-bit MCU, 64KB Flash,DMA,40 MIPS,nanoWatt 44 TQFP 10x10x1mm T/R
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP302-ISO.pdf
(368 pages)
3.PIC24HJ32GP302-ISO.pdf
(8 pages)
4.PIC24HJ32GP302-ISO.pdf
(12 pages)
Specifications of PIC24HJ64GP204T-I/PT
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (22K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC24HJ64GP204T-I/PTTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24HJ64GP204T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC24HJ12GP201-ISO PDF datasheet
- PIC24HJ32GP302-ISO PDF datasheet #2
- PIC24HJ32GP302-ISO PDF datasheet #3
- PIC24HJ32GP302-ISO PDF datasheet #4
- Current page: 23 of 368
- Download datasheet (5Mb)
REGISTER 3-2:
© 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
0’ = Bit is cleared
bit 15-4
bit 3
bit 2
bit 1-0
Note 1:
U-0
U-0
—
—
The IPL3 bit is concatenated with the IPL<2:0> bits (SR<7:5>) to form the CPU interrupt priority level.
PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
Unimplemented: Read as ‘0’
IPL3: CPU Interrupt Priority Level Status bit 3
1 = CPU interrupt priority level is greater than 7
0 = CPU interrupt priority level is 7 or less
PSV: Program Space Visibility in Data Space Enable bit
1 = Program space visible in data space
0 = Program space not visible in data space
Unimplemented: Read as ‘0’
U-0
U-0
—
—
CORCON: CORE CONTROL REGISTER
C = Clear only bit
W = Writable bit
‘x = Bit is unknown
U-0
U-0
—
—
U-0
U-0
—
—
-n = Value at POR
U = Unimplemented bit, read as ‘0’
(1)
IPL3
R/C-0
U-0
—
(1)
R/W-0
PSV
U-0
—
‘1’ = Bit is set
U-0
U-0
—
—
DS70293E-page 23
U-0
U-0
—
—
bit 8
bit 0
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