PIC24HJ32GP204T-I/ML Microchip Technology, PIC24HJ32GP204T-I/ML Datasheet - Page 66
![16-bit MCU, 32KB Flash,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC24HJ32GP204T-I/ML
Manufacturer Part Number
PIC24HJ32GP204T-I/ML
Description
16-bit MCU, 32KB Flash,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP202-ISO.pdf
(272 pages)
3.PIC24HJ32GP202-ISO.pdf
(8 pages)
4.PIC24HJ32GP202-ISO.pdf
(12 pages)
Specifications of PIC24HJ32GP204T-I/ML
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC24HJ32GP204T-I/MLTR
- PIC24HJ12GP201-ISO PDF datasheet
- PIC24HJ32GP202-ISO PDF datasheet #2
- PIC24HJ32GP202-ISO PDF datasheet #3
- PIC24HJ32GP202-ISO PDF datasheet #4
- Current page: 66 of 272
- Download datasheet (4Mb)
PIC24HJ32GP202/204 AND PIC24HJ16GP304
REGISTER 7-1:
DS70289G-page 66
bit 15
bit 7
Legend:
C = Clear only bit
S = Set only bit
‘1’ = Bit is set
bit 7-5
Note 1:
R/W-0
IPL2
U-0
—
2:
3:
(2)
(3)
For complete register details, see
The IPL<2:0> bits are concatenated with the IPL<3> bit (CORCON<3>) to form the CPU Interrupt Priority
Level. The value in parentheses indicates the IPL if IPL<3> = 1. User interrupts are disabled when
IPL<3> = 1.
The IPL<2:0> Status bits are read-only when the NSTDIS bit (INTCON1<15>) = 1.
IPL<2:0>: CPU Interrupt Priority Level Status bits
111 = CPU Interrupt Priority Level is 7 (15), user interrupts disabled
110 = CPU Interrupt Priority Level is 6 (14)
101 = CPU Interrupt Priority Level is 5 (13)
100 = CPU Interrupt Priority Level is 4 (12)
011 = CPU Interrupt Priority Level is 3 (11)
010 = CPU Interrupt Priority Level is 2 (10)
001 = CPU Interrupt Priority Level is 1 (9)
000 = CPU Interrupt Priority Level is 0 (8)
R/W-0
IPL1
U-0
—
SR: CPU STATUS REGISTER
(2)
(3)
R = Readable bit
W = Writable bit
‘0’ = Bit is cleared
R/W-0
IPL0
U-0
—
(2)
(3)
Register
U-0
R-0
RA
—
3-1.
(1)
U = Unimplemented bit, read as ‘0’
-n = Value at POR
x = Bit is unknown
R/W-0
U-0
—
N
(2)
R/W-0
U-0
OV
—
© 2011 Microchip Technology Inc.
R/W-0
U-0
—
Z
R/W-0
R/W-0
DC
C
bit 8
bit 0
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