PIC24HJ32GP204T-I/ML Microchip Technology, PIC24HJ32GP204T-I/ML Datasheet - Page 42
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PIC24HJ32GP204T-I/ML
Manufacturer Part Number
PIC24HJ32GP204T-I/ML
Description
16-bit MCU, 32KB Flash,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP202-ISO.pdf
(272 pages)
3.PIC24HJ32GP202-ISO.pdf
(8 pages)
4.PIC24HJ32GP202-ISO.pdf
(12 pages)
Specifications of PIC24HJ32GP204T-I/ML
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC24HJ32GP204T-I/MLTR
- PIC24HJ12GP201-ISO PDF datasheet
- PIC24HJ32GP202-ISO PDF datasheet #2
- PIC24HJ32GP202-ISO PDF datasheet #3
- PIC24HJ32GP202-ISO PDF datasheet #4
- Current page: 42 of 272
- Download datasheet (4Mb)
PIC24HJ32GP202/204 AND PIC24HJ16GP304
4.4
The PIC24HJ32GP202/204 and PIC24HJ16GP304
architecture uses a 24-bit-wide program space and a
16 bit wide data space. The architecture is also a
modified Harvard scheme, which means that the data
can also be present in the program space. To use this
data successfully, it must be accessed in a way that
preserves the alignment of information in both spaces.
Aside
PIC24HJ32GP202/204
architecture provides two methods by which program
space can be accessed during operation:
• Using table instructions to access individual bytes
• Remapping a portion of the program space into
Table instructions allow an application to read or write
to small areas of the program memory. This capability
makes the method ideal for accessing data tables that
need to be updated periodically. It also allows access
to all bytes of the program word. The remapping
method allows an application to access a large block of
data on a read-only basis, which is ideal for look ups
from a large table of static data. The application can
only access the least significant word of the program
word.
TABLE 4-24:
DS70289G-page 42
Instruction Access
(Code Execution)
TBLRD/TBLWT
(Byte/Word Read/Write)
Program Space Visibility
(Block Remap/Read)
Note 1:
or words anywhere in the program space
the data space (Program Space Visibility)
Access Type
Interfacing Program and Data
Memory Spaces
from
Data EA<15> is always ‘1’ in this case, but is not used in calculating the program space address. Bit 15 of
the address is PSVPAG<0>.
PROGRAM SPACE ADDRESS CONSTRUCTION
normal
and
User
User
Configuration
User
Access
execution,
Space
PIC24HJ16GP304
the
<23>
0
0
0
TBLPAG<7:0>
TBLPAG<7:0>
0xxx xxxx
1xxx xxxx
0xx
4.4.1
Since the address ranges for the data and program
spaces are 16 and 24 bits, respectively, a method is
needed to create a 23-bit or 24-bit program address
from 16-bit data registers. The solution depends on the
interface method to be used.
For table operations, the 8-bit Table Page register
(TBLPAG) is used to define a 32K word region within
the program space. This is concatenated with a 16-bit
EA to arrive at a full 24-bit program space address. In
this format, the Most Significant bit of TBLPAG is used
to determine if the operation occurs in the user memory
(TBLPAG<7> = 0) or the configuration memory
(TBLPAG<7> = 1).
For remapping operations, the 8-bit Program Space
Visibility register (PSVPAG) is used to define a
16K word page in the program space. When the Most
Significant bit of the EA is ‘1’, PSVPAG is concatenated
with the lower 15 bits of the EA to form a 23-bit program
space address. Unlike table operations, this limits
remapping operations strictly to the user memory area.
Table 4-24
created for table operations and remapping accesses
from the data EA. Here, P<23:0> refers to a program
space word, and D<15:0> refers to a data space word.
<22:16>
xxxx xxxx
PSVPAG<7:0>
xxxx
Program Space Address
and
ADDRESSING PROGRAM SPACE
xxxx
PC<22:1>
Figure 4-5
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
<15>
xxxx
© 2011 Microchip Technology Inc.
show how the program EA is
xxx xxxx xxxx xxxx
Data EA<15:0>
Data EA<15:0>
xxxx xxx0
<14:1>
Data EA<14:0>
(1)
<0>
0
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