PIC24FJ32GA004T-I/PT Microchip Technology, PIC24FJ32GA004T-I/PT Datasheet - Page 11
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PIC24FJ32GA004T-I/PT
Manufacturer Part Number
PIC24FJ32GA004T-I/PT
Description
32KB, Flash, 8192bytes-RAM, 16MIPS, 35I/O, 16-bit Family,nanoWatt 44 TQFP 10x10x
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ16GA002-ISS.pdf
(52 pages)
2.PIC24FJ16GA002-ISS.pdf
(268 pages)
3.PIC24FJ16GA002-ISS.pdf
(22 pages)
Specifications of PIC24FJ32GA004T-I/PT
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164335 - MODULE SKT FOR 10X10 PM3 44TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC24FJ32GA004T-I/PTTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ32GA004T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC24FJ32GA004T-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
26. Module: I
27. Module: UART
2010 Microchip Technology Inc.
Bit and byte-based operations may not have the
intended affect on the I2CxSTAT register. It is
possible for bit and byte operations performed on
the lower byte of I2CxSTAT to clear the BCL bit
(I2CxSTAT<10>).
performed on the upper byte of I2CxSTAT, or on
the BCL bit directly, may not be able to clear the
BCL bit.
Work around
Modifications to the I2CxSTAT register should be
done using word writes only. This can be done in
‘C’ by always writing to the register itself and not
the individual bits. For example, the code,
I2C1STAT &= 0xFBFF, will force the compiler to
use a word-based operation to clear the BCL bit.
In assembly, it is done by not using BSET or BCLR
instructions, or instructions with the .b modifier.
Affected Silicon Revisions
When the UART is configured for IR interface
operations (UxMODE<9:8> = 11), the 16x baud
clock signal on the BCLK pin will only be present
when the module is transmitting. The pin will be
Idle at all other times.
Work around
Configure one of the output compare modules to
generate the required baud clock signal when the
UART is receiving data or in an Idle state.
Affected Silicon Revisions
A3/
A3/
A4
A4
X
X
B4
B4
2
C
B5
B5
Bit
B8
B8
and
byte
operation
PIC24FJ64GA004 FAMILY
28. Module: I/O (Peripheral Pin Select)
29. Module: UART (UERIF Interrupt)
The remappable pin functions multiplexed to some
pins do not have a higher priority than fixed digital
signals assigned to those pins. By design, a
remapped digital function should always have
priority over any other fixed digital function on the
same pin.
Using these remappable and specific fixed digital
functions at the same time may cause conflicts
and unexpected results on:
• RP12 and PMD0
• RP18 and PMA2 (40-pin and 44-pin devices
No other fixed digital functions are affected.
Work around
On the affected pins, enable either the remappable
peripherals, or the specific fixed digital peripherals,
but not both at the same time.
Affected Silicon Revisions
The UART error interrupt may not occur, or occur
at an incorrect time, if multiple errors occur during
a short period of time.
Work around
Read the error flags in the UxSTA register when-
ever a byte is received to verify the error status. In
most cases, these bits will be correct, even if the
UART error interrupt fails to occur. For possible
exceptions, refer to Errata #
Affected Silicon Revisions
A3/
A3/
A4
A4
only)
X
X
B4
B4
X
B5
B5
X
B8
B8
X
30.
DS80470E-page 11