PIC24FJ16MC101-I/P Microchip Technology, PIC24FJ16MC101-I/P Datasheet - Page 57

• Manufacturer Part Number: PIC24FJ16MC101-I/P
• Description: 16-bit Motor Control Family, 16 MIPS, 16KB Flash, 1KB RAM 20 PDIP .300in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ16MC101-I/P

• Featured Product: PIC24FJ/33FJ MCUs & dsPIC® DSCs
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 16 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 16KB (5.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6.1
The PIC24FJ16MC101/102 family of devices have two
types of Reset:
• Cold Reset
• Warm Reset
A cold Reset is the result of a POR or a BOR. On a cold
Reset, the FNOSC configuration bits in the FOSC
device configuration register selects the device clock
source.
TABLE 6-1:
© 2011 Microchip Technology Inc.
FRC, FRCDIV16, FRCDIVN
Note 1:
Oscillator Mode
2:
3:
System Reset
FRCPLL
MSPLL
ECPLL
SOSC
T
times vary with crystal characteristics, load capacitance, etc.
T
10 MHz crystal and T
T
LPRC
OSCD
OST
LOCK
MS
HS
EC
= Oscillator Start-up Timer Delay (1024 oscillator clock period). For example, T
OSCILLATOR DELAY
= Oscillator Start-up Delay (1.1 μs max for FRC, 70 μs max for LPRC). Crystal Oscillator start-up
= PLL lock time (1.5 ms nominal), if PLL is enabled.
OST
Startup Delay
Oscillator
T
T
T
T
T
T
T
= 32 ms for a 32 kHz crystal.
OSCD
OSCD
OSCD
OSCD
OSCD
OSCD
OSCD
—
—
Preliminary
Oscillator Startup
Timer
T
T
T
T
OST
OST
OST
OST
—
—
—
—
—
A warm Reset is the result of all other Reset sources,
including the RESET instruction. On warm Reset, the
device will continue to operate from the current clock
source as indicated by the Current Oscillator Selection
bits (COSC<2:0>) in the Oscillator Control register
(OSCCON<14:12>).
The device is kept in a Reset state until the system
power supplies have stabilized at appropriate levels
and the oscillator clock is ready. The sequence in
which this occurs is shown in
PIC24FJ16MC101/102
PLL Lock Time
T
T
T
LOCK
LOCK
LOCK
—
—
—
—
—
—
Figure
T
OSCD
OST
T
T
T
T
OSCD
Total Delay
OSCD
OSCD
OSCD
= 102.4 μs for a
DS39997B-page 57
6-2.
+ T
T
T
T
OSCD
OSCD
LOCK
OST
—
+ T
+ T
+ T
+ T
LOCK
+ T
OST
OST
OST
LOCK