PIC24FJ128DA110T-I/BG Microchip Technology, PIC24FJ128DA110T-I/BG Datasheet - Page 260
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PIC24FJ128DA110T-I/BG
Manufacturer Part Number
PIC24FJ128DA110T-I/BG
Description
16-bit, 128KB Flash, 24K RAM, USB, Graphics 121 XBGA 10x10x1.20mm T/R
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Specifications of PIC24FJ128DA110T-I/BG
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
128KB (43K x 24)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
121-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ128DA110T-I/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC24FJ256DA210 FAMILY
REGISTER 18-8:
DS39969B-page 260
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R-x, HSC
JSTATE
U-0
—
Unimplemented: Read as ‘0’
JSTATE: Live Differential Receiver J State Flag bit
1 = J state (differential ‘0’ in low speed, differential ‘1’ in full speed) is detected on the USB
0 = No J state is detected
SE0: Live Single-Ended Zero Flag bit
1 = Single-ended zero is active on the USB bus
0 = No single-ended zero is detected
TOKBUSY: Token Busy Status bit
1 = Token is being executed by the USB module in On-The-Go state
0 = No token is being executed
USBRST: Module Reset bit
1 = USB Reset has been generated; for software Reset, application must set this bit for 50 ms, then
0 = USB Reset is terminated
HOSTEN: Host Mode Enable bit
1 = USB host capability is enabled; pull-downs on D+ and D- are activated in hardware
0 = USB host capability is disabled
RESUME: Resume Signaling Enable bit
1 = Resume signaling is activated; software must set bit for 10 ms and then clear to enable remote
0 = Resume signaling is disabled
PPBRST: Ping-Pong Buffers Reset bit
1 = Reset all Ping-Pong Buffer Pointers to the even BD banks
0 = Ping-Pong Buffer Pointers are not reset
SOFEN: Start-Of-Frame Enable bit
1 = Start-Of-Frame token is sent every one 1 ms
0 = Start-Of-Frame token is disabled
R-x, HSC
SE0
clear it
wake-up
U-0
—
U1CON: USB CONTROL REGISTER (HOST MODE ONLY)
U = Unimplemented bit, read as ‘0’
W = Writable bit
‘1’ = Bit is set
TOKBUSY
R/W-0
U-0
—
USBRST
R/W-0
U-0
—
HSC = Hardware Settable/Clearable bit
‘0’ = Bit is cleared
HOSTEN
R/W-0
U-0
—
RESUME
R/W-0
U-0
—
2010 Microchip Technology Inc.
x = Bit is unknown
PPBRST
R/W-0
U-0
—
SOFEN
R/W-0
U-0
—
bit 8
bit 0
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