PIC24F16KA101T-I/SS Microchip Technology, PIC24F16KA101T-I/SS Datasheet - Page 40
![16KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 16 I/O,16-bit PIC24F Family, NanoWatt](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC24F16KA101T-I/SS
Manufacturer Part Number
PIC24F16KA101T-I/SS
Description
16KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 16 I/O,16-bit PIC24F Family, NanoWatt
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.MA240017.pdf
(254 pages)
2.PIC24F04KA201-ISS.pdf
(48 pages)
3.PIC24F16KA101-ISS.pdf
(18 pages)
Specifications of PIC24F16KA101T-I/SS
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
16KB (5.5K x 24)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24F16KA101T-I/SS
Manufacturer:
MICROCHIR
Quantity:
20 000
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PIC24F16KA102 FAMILY
TABLE 4-24:
FIGURE 4-5:
DS39927B-page 38
Instruction Access
(Code Execution)
TBLRD/TBLWT
(Byte/Word Read/Write)
Program Space Visibility
(Block Remap/Read)
Note 1:
Note 1: The LSb of program space addresses is always fixed as ‘0’ in order to maintain word alignment of data in the
Access Type
2:
Program Counter
Table Operations
Program Space Visibility
(Remapping)
2: Table operations are not required to be word-aligned. Table read operations are permitted in the configuration
Data EA<15> is always ‘1’ in this case, but is not used in calculating the program space address. Bit 15 of
the address is PSVPAG<0>.
PSVPAG can have only two values (‘00’ to access program memory and FF to access data EEPROM) on
the PIC24F16KA102 family.
program and data spaces.
memory space.
PROGRAM SPACE ADDRESS CONSTRUCTION
DATA ACCESS FROM PROGRAM SPACE ADDRESS GENERATION
(2)
(1)
User
User
Configuration
User
(1)
User/Configuration
Access
Space
Space Select
1/0
0
0
TBLPAG
8 Bits
Preliminary
PSVPAG
<23>
8 Bits
0
0
0
Select
TBLPAG<7:0>
TBLPAG<7:0>
0xxx xxxx
1xxx xxxx
Program Counter
0xx xxxx xxxx xxxx xxxx xxx0
<22:16>
PSVPAG<7:0>
24 Bits
1
xxxx xxxx
23 Bits
Program Space Address
23 Bits
PC<22:1>
(2)
16 Bits
<15>
15 Bits
EA
EA
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
© 2009 Microchip Technology Inc.
Data EA<15:0>
Data EA<15:0>
xxx xxxx xxxx xxxx
<14:1>
Data EA<14:0>
Byte Select
1/0
0
0
(1)
<0>
0
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