PIC24F16KA101T-I/SS Microchip Technology, PIC24F16KA101T-I/SS Datasheet - Page 195
![16KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 16 I/O,16-bit PIC24F Family, NanoWatt](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC24F16KA101T-I/SS
Manufacturer Part Number
PIC24F16KA101T-I/SS
Description
16KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 16 I/O,16-bit PIC24F Family, NanoWatt
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.MA240017.pdf
(254 pages)
2.PIC24F04KA201-ISS.pdf
(48 pages)
3.PIC24F16KA101-ISS.pdf
(18 pages)
Specifications of PIC24F16KA101T-I/SS
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
16KB (5.5K x 24)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24F16KA101T-I/SS
Manufacturer:
MICROCHIR
Quantity:
20 000
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REGISTER 26-6:
REGISTER 26-7:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-2
bit 1-0
MCLRE
DEBUG
R/P-1
R/P-1
2:
3:
(2)
Applies only to 28-pin devices.
The MCLRE fuse can only be changed when using the V
user from accidentally locking out the device from the low-voltage test entry.
Refer to the electrical specifications for BOR voltages.
MCLRE: MCLR Pin Enable bit
1 = MCLR pin enabled; RA5 input pin disabled
0 = RA5 input pin enabled; MCLR disabled
BORV<1:0>: Brown-out Reset Enable bits
11 = Brown-out Reset set to lowest voltage
10 = Brown-out Reset
01 = Brown-out Reset set to highest voltage
00 = Low-power Brown-out Reset occurs around 2.0V
I2C1SEL: Alternate I2C1 Pin Mapping bit
0 = Alternate location for SCL1/SDA1 pins
1 = Default location for SCL1/SDA1 pins
PWRTEN: Power-up Timer Enable bit
0 = PWRT disabled
1 = PWRT enabled
Unimplemented: Read as ‘0’
BOREN<1:0>: Brown-out Reset Enable bits
11 = Brown-out Reset enabled in hardware; SBOREN bit disabled
10 = Brown-out Reset enabled only while device is active and disabled in Sleep; SBOREN bit disabled
01 = Brown-out Reset controlled with the SBOREN bit setting
00 = Brown-out Reset disabled in hardware; SBOREN bit disabled
DEBUG: Background Debugger Enable bit
1 = Background debugger disabled
0 = Background debugger functions enabled
Unimplemented: Read as ‘0’
FICD<1:0:> ICD Pin Select bits
11 = PGC1/PGD1 are used for programming and debugging the device
10 = PGC2/PGD2 are used for programming and debugging the device
01 = PGC3/PGD3 are used for programming and debugging the device
00 = Reserved; do not use
BORV1
R/P-1
U-0
—
FPOR: RESET CONFIGURATION REGISTER
FICD: IN-CIRCUIT DEBUGGER CONFIGURATION REGISTER
(3)
P = Programmable bit
‘1’ = Bit is set
P = Programmable bit
‘1’ = Bit is set
BORV0
R/P-1
U-0
—
(3)
(2)
I2C1SEL
R/P-1
U-0
—
Preliminary
PIC24F16KA102 FAMILY
(1)
(1)
(3)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PWRTEN
R/P-1
U-0
—
PP
-Based ICSP™ mode entry. This prevents a
U-0
U-0
—
—
x = Bit is unknown
x = Bit is unknown
BOREN1
FICD1
R/P-1
R/P-1
DS39927B-page 193
BOREN0
FICD0
R/P-1
R/P-1
bit 0
bit 0
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