PIC18LF26J53-I/SP Microchip Technology, PIC18LF26J53-I/SP Datasheet - Page 550

no-image

PIC18LF26J53-I/SP

Manufacturer Part Number
PIC18LF26J53-I/SP
Description
28-pin, USB, 64KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC 28 SPDIP .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18LF26J53-I/SP

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 2.75 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F47J53 FAMILY
FIGURE 31-20:
TABLE 31-28: EUSARTx SYNCHRONOUS TRANSMISSION REQUIREMENTS
FIGURE 31-21:
TABLE 31-29: EUSARTx SYNCHRONOUS RECEIVE REQUIREMENTS
DS39964B-page 550
120
121
122
125
126
Param
Param.
No.
No.
Note:
RXx/DTx
TXx/CKx
Note:
T
T
T
RXx/DTx
TXx/CKx
T
T
CK
CKRF
Symbol
DTRF
CK
Symbol
DT
pin
pin
H2
L2
V2
pin
pin
Refer to Figure 31-4 for load conditions.
DT
DTL
CKL
V Sync XMIT (Master and Slave)
Refer to Figure 31-4 for load conditions.
Clock High to Data Out Valid
Clock Out Rise Time and Fall Time (Master mode)
Data Out Rise Time and Fall Time
Sync RCV (Master and Slave)
Data Hold before CKx  (DTx hold time)
Data Hold after CKx  (DTx hold time)
EUSARTx SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
EUSARTx SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
120
Characteristic
121
Characteristic
125
Preliminary
121
126
Min
10
15
Min
Max
122
Units
 2010 Microchip Technology Inc.
Max
ns
ns
20
40
20
Units
ns
ns
ns
Conditions
Conditions

Related parts for PIC18LF26J53-I/SP