PIC18F96J65-I/PF Microchip Technology, PIC18F96J65-I/PF Datasheet - Page 17
![96KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 14x14x1mm TRAY](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC18F96J65-I/PF
Manufacturer Part Number
PIC18F96J65-I/PF
Description
96KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 14x14x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F66J65-IPT.pdf
(8 pages)
3.PIC18F66J65-IPT.pdf
(480 pages)
4.PIC18F66J65-IPT.pdf
(4 pages)
5.PIC18F66J65-IPT.pdf
(10 pages)
6.PIC18F96J60-IPT.pdf
(24 pages)
Specifications of PIC18F96J65-I/PF
Core Processor
PIC
Core Size
8-Bit
Speed
41.667MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
96KB (48K x 16)
Program Memory Type
FLASH
Ram Size
3808 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3808 B
Interface Type
Display Driver, Ethernet, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
41.667 MHz
Number Of Programmable I/os
70
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183033, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162064 - HEADER INTFC MPLABICD2 64/80/100
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F96J65-I/PF
Manufacturer:
Microchip
Quantity:
251
Company:
Part Number:
PIC18F96J65-I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
TABLE 5-3:
© 2009 Microchip Technology Inc.
DEBUG
XINST
STVREN
WDTEN
CP0
IESO
FCMEN
FOSC2
FOSC1:FOSC0
Bit Name
PIC18F97J60 FAMILY BIT DESCRIPTIONS
Configuration
CONFIG1H
CONFIG1L
CONFIG1L
CONFIG1L
CONFIG1L
CONFIG2L
CONFIG2L
CONFIG2L
CONFIG2L
Words
Watchdog Timer Enable bit
Code Protection bit
Fail-Safe Clock Monitor Enable bit
Background Debugger Enable bit
1 = Background debugger disabled, RB6 and RB7 configured as general
0 = Background debugger enabled, RB6 and RB7 are dedicated to in-circuit
Extended Instruction Set Enable bit
1 = Instruction set extension and Indexed Addressing mode enabled
0 = Instruction set extension and Indexed Addressing mode disabled
Stack Overflow/Underflow Reset Enable bit
1 = Reset on stack overflow/underflow enabled
0 = Reset on stack overflow/underflow disabled
1 = WDT enabled
0 = WDT disabled (control is placed on SWDTEN bit)
1 = Program memory is not code-protected
0 = Program memory is code-protected
Internal/External Oscillator Switchover bit
1 = Oscillator Switchover mode enabled
0 = Oscillator Switchover mode disabled
1 = Fail-Safe Clock Monitor enabled
0 = Fail-Safe Clock Monitor disabled
Primary Oscillator Select bit
1 = Default primary oscillator on start-up is EC or HS, depending on settings of
0 = Default primary oscillator on start-up is INTRC; INTRC also selected when
Oscillator Selection bits
11 = EC oscillator, PLL enabled and under software control, CLKO function on
10 = EC oscillator, CLKO function on OSC2
01 = HS oscillator, PLL enabled and under software control
00 = HS oscillator
purpose I/O pins
debug
(Legacy mode)
FOSC1:FOSC0; INTRC selected when OSCCON<1:0> = 11
OSCCON<1:0> = 11 or 00
OSC2
PIC18F97J60 FAMILY
Description
DS39688D-page 17