PIC18F65J50T-I/PT Microchip Technology, PIC18F65J50T-I/PT Datasheet - Page 296
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F65J50T-I/PT
Manufacturer Part Number
PIC18F65J50T-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F63J11-IPT.pdf
(36 pages)
3.PIC18F65J50-IPT.pdf
(480 pages)
4.PIC18F65J50-IPT.pdf
(16 pages)
Specifications of PIC18F65J50T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
49
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
I2C, MSSP, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
49
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18F65J50T-I/PTTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F65J50T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F63J11-IPT PDF datasheet #2
- PIC18F65J50-IPT PDF datasheet #3
- PIC18F65J50-IPT PDF datasheet #4
- Current page: 296 of 480
- Download datasheet (8Mb)
PIC18F87J50 FAMILY
FIGURE 20-12:
TABLE 20-7:
DS39775C-page 296
INTCON
PIR1
PIE1
IPR1
PIR3
PIE3
IPR3
RCSTAx
TXREGx
TXSTAx
BAUDCONx ABDOVF
SPBRGHx
SPBRGx
ODCON2
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for synchronous master transmission.
Name
Note: This example is equally applicable to EUSART2 (RG1/TX2/CK2 and RG2/RX2/DT2).
RC7/RX1/DT1 pin
RC6/TX1/CK1 pin
TXREG1 reg
EUSARTx Transmit Register
EUSARTx Baud Rate Generator Register High Byte
EUSARTx Baud Rate Generator Register Low Byte
GIE/GIEH PEIE/GIEL TMR0IE
SSP2IF
SSP2IE
SSP2IP
PMPIF
PMPIE
PMPIP
CSRC
SPEN
TRMT bit
TX1IF bit
TXEN bit
Bit 7
REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER TRANSMISSION
Write to
—
SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
BCL2IE
BCL2IP
BCL2IF
RCIDL
ADIF
ADIE
ADIP
Bit 6
RX9
TX9
—
DTRXP
RC1IE
RC1IP
RC2IE
RC2IP
RC1IF
RC2IF
SREN
TXEN
Bit 5
bit 0
—
INT0IE
TX1IE
TX1IP
TX2IE
TX2IP
CREN
SYNC
TX1IF
TX2IF
SCKP
Bit 4
—
bit 1
TMR4IE
TMR4IP
SSP1IE
SSP1IP
TMR4IF
ADDEN
SSP1IF
SENDB
BRG16
RBIE
Bit 3
bit 2
TMR0IF
CCP1IF
CCP1IE
CCP1IP
CCP5IF
CCP5IE
CCP5IP
BRGH
FERR
Bit 2
—
bit 6
TMR2IE
TMR2IP
TMR2IF
CCP4IF
CCP4IE
CCP4IP
INT0IF
OERR
TRMT
U2OD
WUE
Bit 1
© 2009 Microchip Technology Inc.
bit 7
TMR1IF
TMR1IE
TMR1IP
CCP3IF
CCP3IE
CCP3IP
ABDEN
U1OD
RX9D
TX9D
RBIF
Bit 0
on Page:
Values
Reset
61
64
64
64
64
64
64
63
63
63
65
65
65
62
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