PIC18F65J50T-I/PT Microchip Technology, PIC18F65J50T-I/PT Datasheet - Page 115
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F65J50T-I/PT
Manufacturer Part Number
PIC18F65J50T-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F63J11-IPT.pdf
(36 pages)
3.PIC18F65J50-IPT.pdf
(480 pages)
4.PIC18F65J50-IPT.pdf
(16 pages)
Specifications of PIC18F65J50T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
49
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
I2C, MSSP, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
49
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18F65J50T-I/PTTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F65J50T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F63J11-IPT PDF datasheet #2
- PIC18F65J50-IPT PDF datasheet #3
- PIC18F65J50-IPT PDF datasheet #4
- Current page: 115 of 480
- Download datasheet (8Mb)
7.7
In 8-Bit Data Width mode, the External Memory Bus
operates only in Multiplexed mode; that is, data shares
the 8 Least Significant bits of the address bus.
Figure 7-6 shows an example of 8-Bit Multiplexed
mode for 80-pin devices. This mode is used for a single
8-bit memory connected for 16-bit operation. The
instructions will be fetched as two 8-bit bytes on a
shared data/address bus. The two bytes are sequen-
tially fetched within one instruction cycle (T
Therefore, the designer must choose external memory
devices according to timing calculations based on
1/2 T
ory speed selection, glue logic propagation delay times
must be considered, along with setup and hold times.
FIGURE 7-6:
© 2009 Microchip Technology Inc.
CY
(2 times the instruction rate). For proper mem-
8-Bit Data Width Mode
Note 1:
2:
PIC18F87J50
Upper order address bits are only used for 20-bit address width. The upper AD byte is used for all
address widths except 8-bit.
This signal only applies to table writes. See Section 6.1 “Table Reads and Table Writes”.
AD<15:8>
A<19:16>
8-BIT MULTIPLEXED MODE EXAMPLE
AD<7:0>
WRL
ALE
BA0
CE
OE
(1)
(1)
CY
).
373
PIC18F87J50 FAMILY
The Address Latch Enable (ALE) pin indicates that the
address bits, AD<15:0>, are available on the external
memory interface bus. The Output Enable signal (OE)
will enable one byte of program memory for a portion of
the instruction cycle, then BA0 will change and the
second byte will be enabled to form the 16-bit instruc-
tion word. The Least Significant bit of the address, BA0,
must be connected to the memory devices in this
mode. The Chip Enable signal (CE) is active at any
time that the microcontroller accesses external
memory, whether reading or writing. It is inactive
(asserted high) whenever the device is in Sleep mode.
This generally includes basic EPROM and Flash
devices. It allows table writes to byte-wide external
memories.
D<7:0>
A<19:0>
D<15:8>
Address Bus
Data Bus
Control Lines
A0
OE
A<x:1>
D<7:0>
CE
WR
DS39775C-page 115
(2)
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