PIC18F45K80-E/ML Microchip Technology, PIC18F45K80-E/ML Datasheet - Page 407
![ECAN, 32KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 44 QFN 8x8x0.9mm TUBE](/photos/39/70/397090/qfn-44_sml.jpg)
PIC18F45K80-E/ML
Manufacturer Part Number
PIC18F45K80-E/ML
Description
ECAN, 32KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 44 QFN 8x8x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18F45K80-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
*
Processor Series
PIC18F45K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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REGISTER 27-11: TXBnDLC: TRANSMIT BUFFER ‘n’ DATA LENGTH CODE REGISTERS [0
REGISTER 27-12: TXERRCNT: TRANSMIT ERROR COUNT REGISTER
2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-4
bit 3-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
TEC7
U-0
R-0
—
Unimplemented: Read as ‘ 0 ’
TXRTR: Transmit Remote Frame Transmission Request bit
1 = Transmitted message will have the TXRTR bit set
0 = Transmitted message will have the TXRTR bit cleared
Unimplemented: Read as ‘ 0 ’
DLC<3:0>: Data Length Code bits
1111 = Reserved
1110 = Reserved
1101 = Reserved
1100 = Reserved
1011 = Reserved
1010 = Reserved
1001 = Reserved
1000 = Data length = 8 bytes
0111 = Data length = 7 bytes
0110 = Data length = 6 bytes
0101 = Data length = 5 bytes
0100 = Data length = 4 bytes
0011 = Data length = 3 bytes
0010 = Data length = 2 bytes
0001 = Data length = 1 bytes
0000 = Data length = 0 bytes
TEC<7:0>: Transmit Error Counter bits
This register contains a value which is derived from the rate at which errors occur. When the error
count overflows, the bus-off state occurs. When the bus has 128 occurrences of 11 consecutive
recessive bits, the counter value is cleared.
TXRTR
R/W-x
TEC6
R-0
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
TEC5
U-0
R-0
—
TEC4
U-0
R-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
PIC18F66K80 FAMILY
R/W-x
DLC3
TEC3
R-0
R/W-x
DLC2
TEC2
R-0
x = Bit is unknown
x = Bit is unknown
R/W-x
TEC1
DLC1
R-0
DS39977C-page 407
R/W-x
DLC0
TEC0
R-0
n
bit 0
bit 0
2]
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