PIC18F44K22-I/MV Microchip Technology, PIC18F44K22-I/MV Datasheet - Page 297

• Manufacturer Part Number: PIC18F44K22-I/MV
• Description: 16KB, Flash, 768bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F44K22-I/MV

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 30x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-UFQFN Exposed Pad
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Number Of Programmable I/os: 36
• Number Of Timers: 1 x 8-bit, 3 x 16-bit
• Operating Supply Voltage: 1.8 V to 5.5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.2.10
This is an example procedure for using the ADC to
perform an Analog-to-Digital conversion:
1.
2.
3.
4.
5.
6.
7.
8.
 2010 Microchip Technology Inc.
Note 1: The global interrupt can be disabled if the
Configure Port:
• Disable pin output driver (See TRIS register)
• Configure pin as analog
Configure the ADC module:
• Select ADC conversion clock
• Configure voltage reference
• Select ADC input channel
• Select result format
• Select acquisition delay
• Turn on ADC module
Configure ADC interrupt (optional):
• Clear ADC interrupt flag
• Enable ADC interrupt
• Enable peripheral interrupt
• Enable global interrupt
Wait the required acquisition time
Start conversion by setting the GO/DONE bit.
Wait for ADC conversion to complete by one of
the following:
• Polling the GO/DONE bit
• Waiting for the ADC interrupt (interrupts
Read ADC Result
Clear the ADC interrupt flag (required if interrupt
is enabled).
enabled)
2: Software delay required if ACQT bits are
A/D CONVERSION PROCEDURE
user is attempting to wake-up from Sleep
and resume in-line code execution.
set to zero delay. See
Acquisition
Requirements”.
(1)
Section 17.3 “A/D
(2)
.
Preliminary
EXAMPLE 17-1:
;This code block configures the ADC
;for polling, Vdd and Vss as reference, Frc
clock and AN0 input.
;
;Conversion start & polling for completion
; are included.
;
MOVLW
MOVWF
MOVLW
MOVWF
BSF
BSF
MOVLW
MOVWF
BSF
ADCPoll:
BTFSC
BRA
; Result is complete - store 2 MSbits in
; RESULTHI and 8 LSbits in RESULTLO
MOVFF
MOVFF
PIC18(L)F2X/4XK22
B’10101111’ ;right justify, Frc,
ADCON2
B’00000000’ ;ADC ref = Vdd,Vss
ADCON1
TRISA,0
ANSEL,0
B’00000001’ ;AN0, ADC on
ADCON0
ADCON0,GO
ADCON0,GO
ADCPoll
ADRESH,RESULTHI
ADRESL,RESULTLO
A/D CONVERSION
; & 12 TAD ACQ time
;
;Set RA0 to input
;Set RA0 to analog
;
;Start conversion
;Is conversion done?
;No, test again
DS41412D-page 297