PIC16F721T-I/SS Microchip Technology, PIC16F721T-I/SS Datasheet - Page 161

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PIC16F721T-I/SS

Manufacturer Part Number
PIC16F721T-I/SS
Description
7 KB FLASH, 256 B SRAM, 18 I/O 20 SSOP .209in T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet

Specifications of PIC16F721T-I/SS

Core Processor
PIC
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
18.0
The Flash Program Memory is readable and writable
during normal operation of the device. This memory is
not directly mapped in the register file space. Instead,
it is indirectly addressed through the Special Function
Registers. There are six SFRs used to read/write this
memory:
• PMCON1
• PMCON2
• PMDATL
• PMDATH
• PMADRL
• PMADRH
When interfacing the program memory block, the
PMDATL and PMDATH registers form a two byte word
which holds the 14-bit program data for reading, and
the PMADRL and PMADRH registers form a two byte
word which holds the 13-bit address of the program
Flash location being accessed. These devices have 2K
to 4K words of program memory with an address range
from 0000h to 0FFFh.
Devices without a full map of memory will shadow
accesses to unused blocks back to the implemented
memory.
EXAMPLE 18-1:
 2010 Microchip Technology Inc.
* This code block will read 1 word of program
* memory at the memory address:
*
*
PROG_ADDR_HI: PROG_ADDR_LO
data will be returned in the variables;
PROG_DATA_HI, PROG_DATA_LO
BANKSEL
MOVLW
MOVWF
MOVLW
MOVWL
BANKSEL
BCF
BSF
NOP
NOP
BSF
BANKSEL
MOVF
MOVWF
MOVF
MOVWF
FLASH PROGRAM MEMORY
SELF READ/SELF WRITE
CONTROL
PMADRL
PROG_ADDR_LO
PMADRL
PROG_ADDR_HI
PMADRH
PMCON1
INTCON,GIE
PMCON1,RD
INTCON,GIE
PMDATL
PMDATL,W
PROG_DATA_LO
PMDATH,W
PROG_DATA_HI
FLASH PROGRAM MEMORY READ
; Select Bank 2
;
; Store LSB of address
;
; Store MSB of address
; Select Bank 3
; Disable interrupts
; Initiate read
; Ignored
; Ignored
; Restore interrupts
; Select Bank 2
; Get LSB of word
; Store in user location
; Get MSB of word
; Store in user location
(Figure
(Figure
18-1)
18-1)
18.1
To read a program memory location, the user must
write two bytes of the address to the PMADRH and
PMADRL
(PMCON1<0>). Once the read control bit is set, the
Program Memory Read (PMR) controller uses the two
instruction cycles to read the data. This causes the two
instructions immediately following the ‘BSF PMCON1,
RD’ instruction to be ignored.
The data is available in the third cycle, following the set
of the RD bit, in the PMDATH and PMDATL registers.
PMDATL and PMDATH registers will hold this value
until another read is executed. See
Figure 18-1
Note:
PIC16F/LF720/721
Program Memory Read Operation
Interrupts must be disabled during the
time from setting PMCON1<0> (RD) to
the third instruction thereafter.
registers,
for more information.
then
set
DS41430A-page 161
Example 18-1
control
bit
and
RD

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