PIC16F616-H/ML Microchip Technology, PIC16F616-H/ML Datasheet - Page 52

• Manufacturer Part Number: PIC16F616-H/ML
• Description: 1.75KB Flash, 64B RAM, 6 I/O, 8MHz Internal Oscillator 16 QFN 4x4mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F616-H/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 11
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 16-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F610/616/16HV610/616
FIGURE 6-2:
6.12
The Timer1 Control register (T1CON), shown in
Register 6-1, is used to control Timer1 and select the
various features of the Timer1 module.
REGISTER 6-1:
DS41288F-page 52
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-4
bit 3
Note 1: Arrows indicate counter increments.
T1GINV
T1CKI = 1
when TMR1
Enabled
T1CKI = 0
when TMR1
Enabled
R/W-0
2: In Counter mode, a falling edge must be registered by the counter prior to the first incrementing rising edge of the clock.
Timer1 Control Register
(1)
T1GINV: Timer1 Gate Invert bit
1 = Timer1 gate is active-high (Timer1 counts when gate is high)
0 = Timer1 gate is active-low (Timer1 counts when gate is low)
TMR1GE: Timer1 Gate Enable bit
If TMR1ON = 0:
This bit is ignored
If TMR1ON = 1:
1 = Timer1 counting is controlled by the Timer1 Gate function
0 = Timer1 is always counting
T1CKPS<1:0>: Timer1 Input Clock Prescale Select bits
11 = 1:8 Prescale Value
10 = 1:4 Prescale Value
01 = 1:2 Prescale Value
00 = 1:1 Prescale Value
T1OSCEN: LP Oscillator Enable Control bit
If INTOSC without CLKOUT oscillator is active:
1 = LP oscillator is enabled for Timer1 clock
0 = LP oscillator is off
Else:
This bit is ignored
TMR1GE
R/W-0
TIMER1 INCREMENTING EDGE
T1CON: TIMER1 CONTROL REGISTER
(2)
W = Writable bit
‘1’ = Bit is set
T1CKPS1
R/W-0
T1CKPS0
(1)
R/W-0
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
T1OSCEN
R/W-0
T1SYNC
R/W-0
© 2009 Microchip Technology Inc.
x = Bit is unknown
TMR1CS
R/W-0
TMR1ON
R/W-0
bit 0