PIC16F616-H/ML Microchip Technology, PIC16F616-H/ML Datasheet - Page 113

1.75KB Flash, 64B RAM, 6 I/O, 8MHz Internal Oscillator 16 QFN 4x4mm TUBE

PIC16F616-H/ML

Manufacturer Part Number
PIC16F616-H/ML
Description
1.75KB Flash, 64B RAM, 6 I/O, 8MHz Internal Oscillator 16 QFN 4x4mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F616-H/ML

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
11
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 150°C
Package / Case
16-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
12.3.4
The BOREN0 and BOREN1 bits in the Configuration
Word register select one of three BOR modes.
Selecting BOREN<1:0> = 10, the BOR is automatically
disabled in Sleep to conserve power and enabled on
wake-up. See Register 12-1 for the Configuration Word
definition.
A brown-out occurs when V
greater than parameter T
“Electrical Specifications”). The brown-out condition
will reset the device. This will occur regardless of V
slew rate. A Brown-out Reset may not occur if V
below V
FIGURE 12-3:
© 2009 Microchip Technology Inc.
Note 1: 64 ms delay only if PWRTE bit is programmed to ‘0’.
BOR
BROWN-OUT RESET (BOR)
for less than parameter T
Internal
Internal
Internal
Reset
Reset
Reset
V
V
V
DD
DD
DD
BROWN-OUT SITUATIONS
BOR
DD
falls below V
(see Section 15.0
BOR
.
PIC16F610/616/16HV610/616
BOR
DD
falls
for
DD
< 64 ms
64 ms
On any Reset (Power-on, Brown-out Reset, Watchdog
timer, etc.), the chip will remain in Reset until V
above V
up Timer will be invoked by the Reset and keep the chip
in Reset an additional 64 ms.
If V
running, the chip will go back into a Brown-out Reset
and the Power-up Timer will be re-initialized. Once V
rises above V
64 ms Reset.
(1)
Note:
64 ms
64 ms
DD
drops below V
BOR
(1)
(1)
The Power-up Timer is enabled by the
PWRTE bit in the Configuration Word
register.
(see Figure 12-3). If enabled, the Power-
BOR
, the Power-up Timer will execute a
BOR
while the Power-up Timer is
V
V
V
BOR
BOR
BOR
DS41288F-page 113
DD
rises
DD

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