PIC12LF1822-I/P Microchip Technology, PIC12LF1822-I/P Datasheet - Page 331
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PIC12LF1822-I/P
Manufacturer Part Number
PIC12LF1822-I/P
Description
3.5 KB Flash, 128 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core, Na
Manufacturer
Microchip Technology
Series
PIC® XLP™ 12Fr
Specifications of PIC12LF1822-I/P
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Processor Series
PIC12LF
Core
PIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12LF1822-I/P
Manufacturer:
MICROCHIP
Quantity:
2 200
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29.2
ADDFSR
Syntax:
Operands:
Operation:
Status Affected:
Description:
ADDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
ADDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
ADDWFC
Syntax:
Operands:
Operation:
Status Affected:
Description:
2010 Microchip Technology Inc.
Instruction Descriptions
Add W and f
[ label ] ADDWF
0 f 127
d 0,1
(W) + (f) (destination)
C, DC, Z
Add the contents of the W register
with register ‘f’. If ‘d’ is ‘0’, the result is
stored in the W register. If ‘d’ is ‘1’, the
result is stored back in register ‘f’.
ADD W and CARRY bit to f
[ label ] ADDWFC
0 f 127
d [0,1]
(W) + (f) + (C) dest
C, DC, Z
Add W, the Carry flag and data mem-
ory location ‘f’. If ‘d’ is ‘0’, the result is
placed in W. If ‘d’ is ‘1’, the result is
placed in data memory location ‘f’.
[ label ] ADDFSR FSRn, k
n [ 0, 1]
FSR(n) + k FSR(n)
the contents of the FSRnH:FSRnL
register pair.
FSRn is limited to the range 0000h -
FFFFh. Moving beyond these bounds
will cause the FSR to wrap around.
[ label ] ADDLW
0 k 255
(W) + k (W)
The contents of the W register are
added to the eight-bit literal ‘k’ and the
result is placed in the W register.
Add Literal to FSRn
-32 k 31
None
The signed 6-bit literal ‘k’ is added to
Add literal and W
C, DC, Z
f,d
k
PIC12F/LF1822/PIC16F/LF1823
f {,d}
Preliminary
ANDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
ANDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
ASRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
AND W with f
[ label ] ANDWF
0 f 127
d 0,1
(W) .AND. (f) (destination)
Z
AND the W register with register ‘f’. If
‘d’ is ‘0’, the result is stored in the W
register. If ‘d’ is ‘1’, the result is stored
back in register ‘f’.
AND literal with W
[ label ] ANDLW
0 k 255
(W) .AND. (k) (W)
Z
The contents of W register are
AND’ed with the eight-bit literal ‘k’.
The result is placed in the W register.
Arithmetic Right Shift
[ label ] ASRF
0 f 127
d [0,1]
(f<7>) dest<7>
(f<7:1>) dest<6:0>,
(f<0>) C,
C, Z
The contents of register ‘f’ are shifted
one bit to the right through the Carry
flag. The MSb remains unchanged. If
‘d’ is ‘0’, the result is placed in W. If ‘d’
is ‘1’, the result is stored back in reg-
ister ‘f’.
register f
f {,d}
DS41413B-page 331
f,d
k
C
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