PIC12LF1822-I/P Microchip Technology, PIC12LF1822-I/P Datasheet - Page 220
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PIC12LF1822-I/P
Manufacturer Part Number
PIC12LF1822-I/P
Description
3.5 KB Flash, 128 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core, Na
Manufacturer
Microchip Technology
Series
PIC® XLP™ 12Fr
Specifications of PIC12LF1822-I/P
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Processor Series
PIC12LF
Core
PIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12LF1822-I/P
Manufacturer:
MICROCHIP
Quantity:
2 200
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PIC12F/LF1822/PIC16F/LF1823
24.4.3
The PWM mode supports an Auto-Shutdown mode that
will disable the PWM outputs when an external
shutdown event occurs. Auto-Shutdown mode places
the PWM output pins into a predetermined state. This
mode is used to help prevent the PWM from damaging
the application.
The auto-shutdown sources are selected using the
CCP1AS<2:0> bits of the CCP1AS register. A shutdown
event may be generated by:
• A logic ‘0’ on the INT pin
• A logic ‘1’ on a Comparator (C1) output
A shutdown condition is indicated by the CCP1ASE
(Auto-Shutdown Event Status) bit of the CCP1AS
register. If the bit is a ‘0’, the PWM pins are operating
normally. If the bit is a ‘1’, the PWM outputs are in the
shutdown state.
When a shutdown event occurs, two things happen:
The CCP1ASE bit is set to ‘1’. The CCP1ASE will
remain set until cleared in firmware or an auto-restart
occurs (see
The enabled PWM pins are asynchronously placed in
their shutdown states. The PWM output pins are
grouped into pairs [P1A/P1C] and [P1B/P1D]. The state
of each pin pair is determined by the PSS1AC and
PSS1BD bits of the CCP1AS register. Each pin pair may
be placed into one of three states:
• Drive logic ‘1’
• Drive logic ‘0’
• Tri-state (high-impedance)
FIGURE 24-14:
DS41413B-page 220
Shutdown
PWM
CCP1ASE bit
ENHANCED PWM AUTO-
SHUTDOWN MODE
Section 24.4.4 “Auto-Restart
Activity
Event
PWM AUTO-SHUTDOWN WITH FIRMWARE RESTART (P1RSEN = 0)
Overflow
Timer
Start of
PWM Period
PWM Period
(Auto-Shutdown)
Mode”).
Event Occurs
Missing Pulse
Overflow
Shutdown
Timer
Preliminary
Event Clears
Overflow
Shutdown
Timer
Note 1: The auto-shutdown condition is a level-
2: Writing to the CCP1ASE bit is disabled
3: Once the auto-shutdown condition has
4: Prior to an auto-shutdown event caused
Missing Pulse
(CCP1ASE not clear)
based signal, not an edge-based signal.
As long as the level is present, the auto-
shutdown will persist.
while
persists.
been removed and the PWM restarted
(either through firmware or auto-restart)
the PWM signal will always restart at the
beginning of the next PWM period.
by a comparator output or INT pin event,
a software shutdown can be triggered in
firmware by setting the CCP1ASE bit of
the CCP1AS register to ‘1’. The Auto-
Restart feature tracks the active status of
a shutdown caused by a comparator out-
put or INT pin event only. If it is enabled at
this time, it will immediately clear this bit
and restart the ECCP module at the
beginning of the next PWM period.
Overflow
Cleared by
CCP1ASE
Firmware
Timer
an
PWM
Resumes
2010 Microchip Technology Inc.
auto-shutdown
Overflow
Timer
condition
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