PIC12F617T-I/MF Microchip Technology, PIC12F617T-I/MF Datasheet - Page 124
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PIC12F617T-I/MF
Manufacturer Part Number
PIC12F617T-I/MF
Description
3.5KB Self Read/Write Flash, 128B RAM, 6 I/O, 8MHz Internal Oscillator 8 DFN 3x3
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F609T-ISN.pdf
(212 pages)
2.PIC12F609T-ISN.pdf
(8 pages)
3.PIC12F617-IP.pdf
(4 pages)
Specifications of PIC12F617T-I/MF
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
5
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12F617T-I/MF
Manufacturer:
MICROCHIP
Quantity:
1 200
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PIC12F609/615/617/12HV609/615
FIGURE 12-9:
12.8
If
programmed, the on-chip program memory can be
read out using ICSP
12.9
Four memory locations (2000h-2003h) are designated
as ID locations where the user can store checksum or
other code identification numbers. These locations are
not accessible during normal execution but are
readable and writable during Program/Verify mode.
Only the Least Significant 7 bits of the ID locations are
used.
DS41302D-page 124
Instruction Flow
(INTCON reg.)
(INTCON reg.)
Note:
Instruction
Fetched
Instruction
Executed
the
CLKOUT
Note 1:
INTF flag
INT pin
GIE bit
OSC1
Code Protection
ID Locations
code
PC
2:
3:
4:
(4)
The entire Flash program memory will be
erased when the code protection is turned
off.
Specification
information.
XT, HS or LP Oscillator mode assumed.
T
GIE = ‘1’ assumed. In this case after wake-up, the processor jumps to 0004h. If GIE = ‘0’, execution will continue in-line.
CLKOUT is not available in XT, HS, LP or EC Oscillator modes, but shown here for timing reference.
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1
Inst(PC) = Sleep
OST
protection
Inst(PC – 1)
= 1024 T
See
PC
™
WAKE-UP FROM SLEEP THROUGH INTERRUPT
for verification purposes.
OSC
the
(DS41204)
(drawing not to scale). This delay does not apply to EC, INTOSC and RC Oscillator modes.
bit(s)
Inst(PC + 1)
Sleep
MemoryProgramming
PC + 1
have
for
Processor in
not
Sleep
more
PC + 2
been
T
OST (2)
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Interrupt Latency
Inst(PC + 2)
Inst(PC + 1)
PC + 2
(3)
Dummy Cycle
PC + 2
2010 Microchip Technology Inc.
Dummy Cycle
Inst(0004h)
0004h
Inst(0005h)
Inst(0004h)
0005h
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