PIC12F609-E/MD Microchip Technology, PIC12F609-E/MD Datasheet - Page 125
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC12F609-E/MD
Manufacturer Part Number
PIC12F609-E/MD
Description
1.75KB Flash, 64B RAM, 6 I/O, 8MHz Internal Oscillator 8 DFN 4x4mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F609T-ISN.pdf
(212 pages)
2.PIC12F609T-ISN.pdf
(8 pages)
3.PIC12F609T-ISN.pdf
(26 pages)
4.PIC12F609T-ISN.pdf
(8 pages)
Specifications of PIC12F609-E/MD
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
5
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-DFN
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
RS-232 , USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
5
Number Of Timers
2
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162083 - HEADER MPLAB ICD2 PIC16F616 8/14AC164326 - MODULA SKT PM3 20QFNXLT08DFN2 - SOCKET TRANSITION ICE 14DIP/8DFN
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
- PIC12F609T-ISN PDF datasheet
- PIC12F609T-ISN PDF datasheet #2
- PIC12F609T-ISN PDF datasheet #3
- PIC12F609T-ISN PDF datasheet #4
- Current page: 125 of 212
- Download datasheet (2Mb)
12.10 In-Circuit Serial Programming™
ThePIC12F609/615/617/12HV609/615
microcontrollers can be serially programmed while in
the end application circuit. This is simply done with five
connections for:
• clock
• data
• power
• ground
• programming voltage
This allows customers to manufacture boards with
unprogrammed devices and then program the
microcontroller just before shipping the product. This
also allows the most recent firmware or a custom
firmware to be programmed.
The device is placed into a Program/Verify mode by
holding the GP0 and GP1 pins low, while raising the
MCLR (V
Programming Specification (DS41284) for more
information. GP0 becomes the programming data and
GP1 becomes the programming clock. Both GP0 and
GP1 are Schmitt Trigger inputs in Program/Verify
mode.
A typical In-Circuit Serial Programming connection is
shown in Figure 12-10.
FIGURE 12-10:
2010 Microchip Technology Inc.
Note:
External
Connector
Signals
* Isolation devices (as required)
Data I/O
CLK
+5V
V
0V
PP
PP
To erase the device V
the Bulk Erase V
Memory
(DS41284)
) pin from V
*
To Normal
Connections
To Normal
Connections
TYPICAL IN-CIRCUIT
SERIAL PROGRAMMING
CONNECTION
*
Programming
IL
*
to V
*
DD
IHH
minimum given in the
PIC12F609/615/617/12HV609/615
V
V
MCLR/V
GP1
GP0
PIC12F615/12HV615
PIC12F609/12HV609
PIC12F617/
DD
SS
DD
. See the Memory
must be above
PP
Specification
/GP3/RA3
12.11 In-Circuit Debugger
Since in-circuit debugging requires access to three pins,
MPLAB
not practical. A special 28-pin PIC12F609/615/617/
12HV609/615 ICD device is used with MPLAB ICD 2 to
provide separate clock, data and MCLR pins and frees
all normally available pins to the user.
A special debugging adapter allows the ICD device to
be used in place of a PIC12F609/615/617/12HV609/
615 device. The debugging adapter is the only source
of the ICD device.
When the ICD pin on the PIC12F609/615/617/
12HV609/615 ICD device is held low, the In-Circuit
Debugger functionality is enabled. This function allows
simple debugging functions when used with MPLAB
ICD 2. When the microcontroller has this feature
enabled, some of the resources are not available for
general use. Table 12-10 shows which features are
consumed by the background debugger.
TABLE 12-10: DEBUGGER RESOURCES
For more information, see “MPLAB
Debugger User’s Guide” (DS51331), available on
Microchip’s web site (www.microchip.com).
FIGURE 12-11:
Resource
I/O pins
Stack
Program Memory
28-Pin PDIP
®
ICD 2 development with an 14-pin device is
ICDMCLR
ICDDATA
ICDCLK
In-Circuit Debug Device
RC5
RC4
RC3
CS0
CS1
CS2
RA5
RA4
RA3
V
NC
DD
Description
ICDCLK, ICDDATA
1 level
Address 0h must be NOP
700h-7FFh
28 PIN ICD PINOUT
10
11
12
13
14
1
2
3
4
5
6
7
8
9
28
27
26
25
24
23
22
21
20
18
17
16
19
15
DS41302D-page 125
®
GND
RA0
RA1
SHUNTEN
RA2
RC0
RC1
RC2
NC
NC
NC
NC
NC
ICD
ICD 2 In-Circuit
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