P5DF081HN/T1AD2060 NXP Semiconductors, P5DF081HN/T1AD2060 Datasheet - Page 6

• Manufacturer Part Number: P5DF081HN/T1AD2060
• Description: P5DF081HN/HVQFN32/REEL13//T1AD
• Manufacturer: NXP Semiconductors
• Series: MIFARE®r

Specifications of P5DF081HN/T1AD2060

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
P5DF081_SDS
Objective short data sheet
PUBLIC
8.2.1.2 Protocol and Parameter Selection (PPS exchange)
8.2.2 Protocol T = 1
8.2.3 APDU structure
Table 5.
After every future warm reset, the mode of operation and therefore also the ATR is toggled
with the ATR after cold reset.
The PPS command allows to individually select the transmission factors and the
communication protocol.
The PPS was successful if the response exactly echoes the request.
The MIFARE SAM AV2 offers a T = 1 protocol which is fully compliant with ISO/IEC
7816-3, Chapter 9.
For details on how to calculate the resulting time-outs, refer to ISO/IEC 7816-3, Chapter
9.5.
All instructions sent to the MIFARE SAM AV2 have to be coded into an APDU structure
according to ISO/IEC 7816-4 and inserted into the information field of one or more
I-Blocks.
The commands do not belong to the inter-industry class. The coding of the command and
response pairs is proprietary, only the structure is compliant with ISO/IEC 7816-4.
Character
TS
T0
TA(1)
TC(1)
TD(1)
TA(2)
TD(2)
TA(3)
TB(3)
TC(3)
TD(3)
TA(after T = 15)
TB(after T = 15)
Historical bytes
TCK
ATR after warm reset
All information provided in this document is subject to legal disclaimers.
Value
3Bh
DFh
18h
FFh
81h
F1h
FEh
43h
00h
3Fh
07h
83h
18h
4Dh, 49h, 46h, 41h, 52h,
45h, 20h, 50h, 6Ch, 75h,
73h, 20h, 53h, 41h, 4Dh
98h
Rev. 1 — 12 August 2010
191710
Meaning
initial character; setting up direct convention
TA(1), TC(1) and TD(1) are present; number of
historical characters is 15
F = 128 and D = 32
no extra guard time needed; N = 255
TA(2) and TD(2) are present; protocol T = 1
specific mode byte: capable of changing the mode
of operation; parameters defined by interface bytes;
protocol T = 1
TA(3), TB(3), TC(3), TD(3) are present; protocol
T = 1
information field size of the card = 254
BWT indicator = 4; CWT indicator = 3
error detection code = LRC
TA and TB for T = 15 is present, protocol T = 15
(qualifies global interface bytes)
clock stop not supported, Class A and Class B
Proprietary use of C6 (IO3, reception of serial data
from RC222)
ASCII value of “MIFARE Plus SAM”
check character
P5DF081
MIFARE SAM AV2
© NXP B.V. 2010. All rights reserved.
6 of 36