MCP7940N-I/SN Microchip Technology, MCP7940N-I/SN Datasheet - Page 16

I2C GP RTCC, 64B SRAM 8 SOIC 3.90mm (.150") TUBE

MCP7940N-I/SN

Manufacturer Part Number
MCP7940N-I/SN
Description
I2C GP RTCC, 64B SRAM 8 SOIC 3.90mm (.150") TUBE
Manufacturer
Microchip Technology
Series
-r
Type
Clock/Calendarr
Datasheet

Specifications of MCP7940N-I/SN

Features
Alarm, Leap Year, SRAM
Memory Size
64B
Time Format
HH:MM:SS (12/24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C
Voltage - Supply
1.8 V ~ 5.5 V
Voltage - Supply, Battery
1.3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Function
Clock, Calendar, Alarm, Battery Backup
Rtc Memory Size
64 B
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Rtc Bus Interface
2-Wire, I2C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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MCP7940N
5.2.2.3
Sequential reads are initiated in the same way as a
random read except that after the MCP7940N
transmits the first data byte, the master issues an
Acknowledge as opposed to the Stop condition used in
a random read. This Acknowledge directs the
MCP7940N
addressed 8-bit word
byte transmitted to the master, the master will NOT
FIGURE 5-5:
FIGURE 5-6:
DS25010A-page 16
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
Sequential Read
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
to
transmit
(Figure
RANDOM READ
SEQUENTIAL READ
CONTROL
BYTE
S
S
T
A
R
T
the
5-6). Following the final
1 1 0 1
A
C
K
CONTROL
BYTE
next
1 1 1
DATA n
sequentially
0
A
C
K
A
C
K
ADDRESS
BYTE
DATA n + 1
generate an Acknowledge but will generate a Stop
condition. To provide sequential reads, the MCP7940N
contains an internal Address Pointer which is
incremented by one at the completion of each
operation. This Address Pointer allows the entire
memory contents to be serially read during one
operation. The internal Address Pointer will automat-
ically roll over to the start of the Block.
A
C
K
S
S
T
A
R
T
1 0 1 0
A
C
K
CONTROL
DATA n + 2
BYTE
1
A
C
K
A
C
K
 2011 Microchip Technology Inc.
BYTE
DATA
DATA n + X
N
O
A
C
K
P
S
T
O
P
N
O
A
C
K
P
S
T
O
P

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