MC33989PEG Freescale Semiconductor, MC33989PEG Datasheet - Page 3

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MC33989PEG

Manufacturer Part Number
MC33989PEG
Description
SBC-HS
Manufacturer
Freescale Semiconductor
Datasheet

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Table 1. 33989 Pin Definitions
Analog Integrated Circuit Device Data
Freescale Semiconductor
Pin Number
A functional description of each pin can be found in the Functional Pin Description section beginning on
20–23
14–17
6–9
10
11
12
13
22
23
24
25
26
27
28
1
2
3
4
5
Pin Name
V2CTRL
VSUP
CANH
VDD1
CANL
SCLK
L0:L3
MISO
MOSI
GND
RST
HS1
WD
INT
RX
CS
TX
V2
Pin Function
Ground
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Power
Power
Power
Input
Input
Input
Input
Input
Input
Voltage Digital Drain
Voltage Source Two
Master In/Slave Out
Master Out/Slave In
V2CTRL
Voltage Control
Voltage Supply
High Side One
Formal Name
Transmit Data
Receive Data
System Clock
Chip Select
VSUP
Watch Dog
VDD1
CAN High
Level 0: 3
CAN Low
GND
GND
GND
GND
Figure 3. 33989 Pin Connections
Interrupt
RST
HS1
Ground
INT
Reset
RX
TX
V2
One
L0
PIN CONNECTIONS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
CAN bus receive data output pin.
CAN bus transmit data input pin.
5.0 V regulator output pin. Supply pin for the MCU.
This is the device reset output pin whose main function is to reset the
MCU. This pin has an internal pullup current source to VDD.
This output is asserted LOW when an enabled interrupt condition occurs.
The output is a push-pull structure.
These device ground pins are internally connected to the package lead
frame to provide a 33989-to-PCB thermal path.
Sense input for the V2 regulator using an external series pass transistor.
V2 is also the internal supply for the CAN transceiver.
Output drive source for the V2 regulator connected to the external series
pass transistor.
Supply input pin for the 33989.
Output of the internal high side switch. The output current is internally
limited to 150 mA.
Inputs from external switches or from logic circuitry.
CAN high output pin.
CAN low output pin.
Clock input pin for the serial peripheral interface (SPI).
SPI data sent to the MCU by the 33989. When CS is HIGH, the pin is in
the high-impedance state.
SPI data received by the 33989.
The CS input pin is used with the SPI bus to select the 33989.
The WD output pin is asserted LOW if the software watchdog is not
correctly triggered.
28
27
26
25
24
23
22
21
20
19
18
17
16
15
WD
CS
MOSI
MISO
SCLK
GND
GND
GND
GND
CANL
CANH
L3
L2
L1
Definition
page
PIN CONNECTIONS
18.
33989
3

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